mirror of https://github.com/duggerd/KFDtool.git
82 lines
2.9 KiB
Markdown
82 lines
2.9 KiB
Markdown
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Test Points
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-----------
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The PT100 PCB has 15 test points, numbered T1 to T15.
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NOTE: T1, T2, T4, T5, T6, T7, T8, T9, T10, T11 are referenced to `GND` (T3). T4, T5, T6, T7, T8, T9, T10, T11 are 3.3V level signals.
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NOTE: T12, T13, T15 are referenced to `GNDISO` (T14). T12, T13, T15 are 5V level signals.
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* T1 - `5V`
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* USB 5V DC power rail
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* Used for MCU USB circuitry and digital isolator power supply
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* T2 - `3V3`
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* Regulated 3.3V DC power rail
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* Used for MCU core and ports and EEPROM
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* T3 - `GND`
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* Ground for PC connected circuitry (MCU/EEPROM)
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* T4 - `SBWTDIO`
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* MCU debug/programming interface, connects to SBW RST on TI LaunchPad ez-FET header
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* T5 - `SBWTCK`
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* MCU debug/programming interface, connects to SBW TST on TI LaunchPad ez-FET header
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* T6 - `GPIO1`
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* General purpose I/O for debugging, pin P4.4 on MCU, hardware serial port on MCU (TX)
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* Currently outputs a LOW when interrupts are enabled, and outputs a HIGH when interrupts are disabled (during reception of byte during timer operation)
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* T7 - `GPIO2`
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* General purpose I/O for debugging, pin P4.5 on MCU, hardware serial port on MCU (RX)
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* Currently toggles state when the `MCU_DATA_IN_3V3` signal is being sampled
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* T8 - `MCU_DATA_OUT_3V3`
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* Controls transistor for DATA signal
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* `MCU_DATA_OUT_3V3` LOW = transistor off = DATA line pulled HIGH (`5VISO`) by pull up resistor
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* `MCU_DATA_OUT_3V3` HIGH = transistor on = DATA line pulled LOW (`GNDISO`) by transistor
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* T9 - `MCU_DATA_IN_3V3`
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* Level shifted version of `KFD_DATA_IN`
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* T10 - `MCU_SENSE_OUT_3V3`
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* Controls transistor for SENSE signal
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* `MCU_SENSE_OUT_3V3` LOW = transistor off = SENSE line pulled HIGH (`5VISO`) by pull up resistor
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* `MCU_SENSE_OUT_3V3` HIGH = transistor on = SENSE line pulled LOW (`GNDISO`) by transistor
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* T11 - `MCU_SENSE_IN_3V3`
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* Level shifted version of `KFD_SENSE_IN`
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* T12 - `KFD_DATA_IN`
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* Target DATA signal
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* T13 - `KFD_SENSE_IN`
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* Target SENSE signal
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* T14 - `GNDISO`
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* Target isolated ground
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* T15 - `5VISO`
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* Target isolated 5V DC power rail
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External Logic Analyzer
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-----------------------
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A external logic analyzer can be connected to monitor the TWI signals independent of the KFDtool. The TWI physical protocol is close to a UART signal, and therefore UART protocol decoders of logic analyzers can be used. The following screenshots are of the Saleae logic analyzer software.
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* Ground - connected to T3
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* Channel 00 "GPIO1" - connected to T6
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* Channel 01 "GPIO2" - connected to T7
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* Channel 02 "DATA_OUT" - connected to T8
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* Channel 03 "DATA_IN" - connected to T9
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* Channel 04 "SENSE_OUT" - connected to T10
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* Channel 05 "SENSE_IN" - connected to T11
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* Trigger - Channel 03 "DATA_IN" falling edge
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Async serial (UART) analyzer settings:
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