428 lines
7.9 KiB
C
428 lines
7.9 KiB
C
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/**
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* \file
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* <!--
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* This file is part of BeRTOS.
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*
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* Bertos is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* As a special exception, you may use this file as part of a free software
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* library without restriction. Specifically, if other files instantiate
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* templates or use macros or inline functions from this file, or you compile
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* this file and link it with other files to produce an executable, this
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* file does not by itself cause the resulting executable to be covered by
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* the GNU General Public License. This exception does not however
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* invalidate any other reasons why the executable file might be covered by
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* the GNU General Public License.
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*
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* Copyright 2005 Develer S.r.l. (http://www.develer.com/)
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*
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* -->
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*
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* \brief I2C bitbang driver (implementation)
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*
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* \author Francesco Sacchi <batt@develer.com>
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* \author Daniele Basile <asterix@develer.com>
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*/
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#include "hw/hw_i2c_bitbang.h"
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#include "cfg/cfg_i2c.h"
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#define LOG_LEVEL I2C_LOG_LEVEL
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#define LOG_FORMAT I2C_LOG_FORMAT
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#include <cfg/log.h>
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#include <cfg/macros.h>
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#include <cfg/module.h>
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#include <drv/timer.h>
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#include <drv/i2c.h>
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#include <cpu/irq.h>
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#include <cpu/attr.h>
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#if !CONFIG_I2C_DISABLE_OLD_API
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INLINE bool i2c_bitbang_start(void)
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{
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SDA_HI;
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SCL_HI;
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I2C_HALFBIT_DELAY();
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SDA_LO;
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I2C_HALFBIT_DELAY();
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return !SDA_IN;
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}
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void i2c_bitbang_stop(void)
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{
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SDA_LO;
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SCL_HI;
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I2C_HALFBIT_DELAY();
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SDA_HI;
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}
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bool i2c_bitbang_put(uint8_t _data)
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{
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/* Add ACK bit */
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uint16_t data = (_data << 1) | 1;
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for (uint16_t i = 0x100; i != 0; i >>= 1)
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{
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SCL_LO;
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if (data & i)
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SDA_HI;
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else
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SDA_LO;
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I2C_HALFBIT_DELAY();
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SCL_HI;
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I2C_HALFBIT_DELAY();
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}
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bool ack = !SDA_IN;
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SCL_LO;
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I2C_HALFBIT_DELAY();
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return ack;
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}
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bool i2c_bitbang_start_w(uint8_t id)
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{
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id &= ~I2C_READBIT;
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/*
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* Loop on the select write sequence: when the device is busy
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* writing previously sent data it will reply to the SLA_W
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* control byte with a NACK. In this case, we must
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* keep trying until the deveice responds with an ACK.
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*/
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ticks_t start = timer_clock();
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while (i2c_bitbang_start())
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{
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if (i2c_bitbang_put(id))
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return true;
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else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
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{
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LOG_ERR("Timeout on I2C start write\n");
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break;
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}
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//LOG_INFO("Rep start\n");
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}
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return false;
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}
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bool i2c_bitbang_start_r(uint8_t id)
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{
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id |= I2C_READBIT;
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if (i2c_bitbang_start())
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{
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if (i2c_bitbang_put(id))
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return true;
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LOG_ERR("NACK on I2c start read\n");
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}
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return false;
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}
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int i2c_bitbang_get(bool ack)
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{
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uint8_t data = 0;
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for (uint8_t i = 0x80; i != 0; i >>= 1)
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{
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SCL_LO;
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I2C_HALFBIT_DELAY();
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SCL_HI;
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if (SDA_IN)
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data |= i;
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else
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data &= ~i;
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I2C_HALFBIT_DELAY();
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}
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SCL_LO;
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if (ack)
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SDA_LO;
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else
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SDA_HI;
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I2C_HALFBIT_DELAY();
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SCL_HI;
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I2C_HALFBIT_DELAY();
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SCL_LO;
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SDA_HI;
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/* avoid sign extension */
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return (int)(uint8_t)data;
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}
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#endif /* !CONFIG_I2C_DISABLE_OLD_API */
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/*
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* New I2C API
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*/
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static bool old_api = false;
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#define I2C_DEV(i2c) ((int)((i2c)->hw))
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static void i2c_bitbang_stop_1(struct I2c *i2c)
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{
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if (old_api)
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{
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SDA_LO;
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SCL_HI;
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I2C_HALFBIT_DELAY();
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SDA_HI;
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}
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else
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{
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i2c_sdaLo(I2C_DEV(i2c));
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i2c_sclHi(I2C_DEV(i2c));
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i2c_halfbitDelay(I2C_DEV(i2c));
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i2c_sdaHi(I2C_DEV(i2c));
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}
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}
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INLINE bool i2c_bitbang_start_1(struct I2c *i2c)
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{
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bool ret;
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/* Clear all error, we restart */
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i2c->errors &= ~(I2C_NO_ACK | I2C_ARB_LOST);
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if (old_api)
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{
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SDA_HI;
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SCL_HI;
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I2C_HALFBIT_DELAY();
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SDA_LO;
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I2C_HALFBIT_DELAY();
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ret = !SDA_IN;
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}
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else
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{
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i2c_sdaHi(I2C_DEV(i2c));
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i2c_sclHi(I2C_DEV(i2c));
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i2c_halfbitDelay(I2C_DEV(i2c));
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i2c_sdaLo(I2C_DEV(i2c));
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i2c_halfbitDelay(I2C_DEV(i2c));
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ret = !i2c_sdaIn(I2C_DEV(i2c));
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}
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return ret;
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}
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static uint8_t i2c_bitbang_getc(struct I2c *i2c)
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{
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uint8_t data = 0;
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if (old_api)
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{
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for (uint8_t i = 0x80; i != 0; i >>= 1)
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{
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SCL_LO;
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I2C_HALFBIT_DELAY();
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SCL_HI;
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if (SDA_IN)
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data |= i;
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else
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data &= ~i;
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I2C_HALFBIT_DELAY();
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}
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SCL_LO;
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/* Generate ACK/NACK */
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if (i2c->xfer_size > 1)
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SDA_LO;
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else
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SDA_HI;
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I2C_HALFBIT_DELAY();
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SCL_HI;
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I2C_HALFBIT_DELAY();
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SCL_LO;
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SDA_HI;
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}
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else
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{
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for (uint8_t i = 0x80; i != 0; i >>= 1)
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{
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i2c_sclLo(I2C_DEV(i2c));
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i2c_halfbitDelay(I2C_DEV(i2c));
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i2c_sclHi(I2C_DEV(i2c));
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if (i2c_sdaIn(I2C_DEV(i2c)))
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data |= i;
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else
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data &= ~i;
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i2c_halfbitDelay(I2C_DEV(i2c));
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}
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i2c_sclLo(I2C_DEV(i2c));
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/* Generate ACK/NACK */
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if (i2c->xfer_size > 1)
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i2c_sdaLo(I2C_DEV(i2c));
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else
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i2c_sdaHi(I2C_DEV(i2c));
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i2c_halfbitDelay(I2C_DEV(i2c));
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i2c_sclHi(I2C_DEV(i2c));
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i2c_halfbitDelay(I2C_DEV(i2c));
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i2c_sclLo(I2C_DEV(i2c));
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i2c_sdaHi(I2C_DEV(i2c));
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}
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/* Generate stop condition (if requested) */
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if ((i2c->xfer_size == 1) && (i2c->flags & I2C_STOP))
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i2c_bitbang_stop_1(i2c);
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return data;
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}
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INLINE void i2c_bitbang_putcStop(struct I2c *i2c, uint8_t _data, bool stop)
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{
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/* Add ACK bit */
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uint16_t data = (_data << 1) | 1;
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bool ack;
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if (old_api)
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{
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for (uint16_t i = 0x100; i != 0; i >>= 1)
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{
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SCL_LO;
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if (data & i)
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SDA_HI;
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else
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SDA_LO;
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I2C_HALFBIT_DELAY();
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SCL_HI;
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I2C_HALFBIT_DELAY();
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}
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ack = !SDA_IN;
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SCL_LO;
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I2C_HALFBIT_DELAY();
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}
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else
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{
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for (uint16_t i = 0x100; i != 0; i >>= 1)
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{
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i2c_sclLo(I2C_DEV(i2c));
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if (data & i)
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i2c_sdaHi(I2C_DEV(i2c));
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else
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i2c_sdaLo(I2C_DEV(i2c));
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i2c_halfbitDelay(I2C_DEV(i2c));
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i2c_sclHi(I2C_DEV(i2c));
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i2c_halfbitDelay(I2C_DEV(i2c));
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}
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ack = !i2c_sdaIn(I2C_DEV(i2c));
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i2c_sclLo(I2C_DEV(i2c));
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i2c_halfbitDelay(I2C_DEV(i2c));
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}
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if (!ack)
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i2c->errors |= I2C_NO_ACK;
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/* Generate stop condition (if requested) */
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if (stop || i2c->errors)
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i2c_bitbang_stop_1(i2c);
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}
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static void i2c_bitbang_putc(struct I2c *i2c, uint8_t data)
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{
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i2c_bitbang_putcStop(i2c, data,
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(i2c->xfer_size == 1) && (i2c->flags & I2C_STOP));
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}
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static void i2c_bitbang_start_2(struct I2c *i2c, uint16_t slave_addr)
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{
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if (i2c->flags & I2C_START_R)
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slave_addr |= I2C_READBIT;
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else
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slave_addr &= ~I2C_READBIT;
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/*
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* Loop on the select write sequence: when the device is busy
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* writing previously sent data it will reply to the SLA_W
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* control byte with a NACK. In this case, we must
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* keep trying until the device responds with an ACK.
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*/
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ticks_t start = timer_clock();
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while (i2c_bitbang_start_1(i2c))
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{
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i2c_bitbang_putcStop(i2c, slave_addr, false);
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if (!(i2c->errors & I2C_NO_ACK))
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return;
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else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
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{
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LOG_ERR("Timeout on I2C start\n");
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i2c->errors |= I2C_START_TIMEOUT;
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i2c_bitbang_stop_1(i2c);
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return;
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}
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}
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LOG_ERR("START arbitration lost\n");
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i2c->errors |= I2C_ARB_LOST;
|
||
|
|
i2c_bitbang_stop_1(i2c);
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
static const I2cVT i2c_bitbang_vt =
|
||
|
|
{
|
||
|
|
.start = i2c_bitbang_start_2,
|
||
|
|
.getc = i2c_bitbang_getc,
|
||
|
|
.putc = i2c_bitbang_putc,
|
||
|
|
.write = i2c_genericWrite,
|
||
|
|
.read = i2c_genericRead,
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
/**
|
||
|
|
* Initialize i2c module.
|
||
|
|
*/
|
||
|
|
void i2c_hw_bitbangInit(I2c *i2c, int dev)
|
||
|
|
{
|
||
|
|
MOD_CHECK(timer);
|
||
|
|
if (dev == I2C_BITBANG_OLD)
|
||
|
|
old_api = true;
|
||
|
|
else
|
||
|
|
i2c->hw = (struct I2cHardware *)(dev - I2C_BITBANG0);
|
||
|
|
|
||
|
|
i2c->vt = &i2c_bitbang_vt;
|
||
|
|
|
||
|
|
if (old_api)
|
||
|
|
{
|
||
|
|
I2C_BITBANG_HW_INIT;
|
||
|
|
SDA_HI;
|
||
|
|
SCL_HI;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
i2c_bitbangInit(I2C_DEV(i2c));
|
||
|
|
i2c_sdaHi(I2C_DEV(i2c));
|
||
|
|
i2c_sclHi(I2C_DEV(i2c));
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|