385 lines
11 KiB
C
385 lines
11 KiB
C
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/**
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* \file
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* <!--
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* This file is part of BeRTOS.
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*
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* Bertos is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* As a special exception, you may use this file as part of a free software
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* library without restriction. Specifically, if other files instantiate
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* templates or use macros or inline functions from this file, or you compile
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* this file and link it with other files to produce an executable, this
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* file does not by itself cause the resulting executable to be covered by
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* the GNU General Public License. This exception does not however
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* invalidate any other reasons why the executable file might be covered by
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* the GNU General Public License.
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*
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* Copyright 2003, 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
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* Copyright 2000, 2001, 2002 Bernie Innocenti <bernie@codewiz.org>
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*
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* -->
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*
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* \brief AVR debug support (implementation).
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*
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* \author Bernie Innocenti <bernie@codewiz.org>
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* \author Stefano Fedrigo <aleph@develer.com>
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* \author Francesco Sacchi <batt@develer.com>
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*/
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#include <hw/hw_cpufreq.h> /* for CPU_FREQ */
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#include "hw/hw_ser.h" /* Required for bus macros overrides */
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#include "cfg/cfg_debug.h"
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#include <cfg/macros.h> /* for BV(), DIV_ROUND */
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#include <cpu/types.h>
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#include <cpu/attr.h>
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#include <avr/io.h>
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#if CONFIG_KDEBUG_PORT == 0
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/*
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* Support for special bus policies or external transceivers
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* on UART0 (to be overridden in "hw/hw_ser.h").
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*
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* HACK: if we don't set TXEN, kdbg disables the transmitter
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* after each output statement until the serial driver
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* is initialized. These glitches confuse the debug
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* terminal that ends up printing some trash.
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*/
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#ifndef KDBG_UART0_BUS_INIT
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#define KDBG_UART0_BUS_INIT do { \
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UCR = BV(TXEN0); \
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} while (0)
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#endif
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#ifndef KDBG_UART0_BUS_RX
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#define KDBG_UART0_BUS_RX do {} while (0)
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#endif
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#ifndef KDBG_UART0_BUS_TX
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#define KDBG_UART0_BUS_TX do {} while (0)
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#endif
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#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 \
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|| CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560
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#define UCR UCSR0B
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#define UDR UDR0
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#define USR UCSR0A
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#elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32
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#define UCR UCSRB
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#define USR UCSRA
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#define TXEN0 TXEN
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#define UDRE0 UDRE
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#define TXC0 TXC
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#define TXCIE0 TXCIE
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#define UDRIE0 UDRIE
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#else
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#error Unknown CPU
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#endif
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#define KDBG_WAIT_READY() do { loop_until_bit_is_set(USR, UDRE0); } while(0)
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#define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(USR, TXC0); } while(0)
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/*
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* We must clear the TXC flag before sending a new character to allow
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* KDBG_WAIT_TXDONE() to work properly.
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*
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* BUG: if KDBG_WRITE_CHAR() is called after the TXC flag is set by hardware,
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* a new TXC could be generated after we've cleared it and before the new
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* character is written to UDR. On a 485 bus, the transceiver will be put
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* in RX mode while still transmitting the last char.
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*/
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#define KDBG_WRITE_CHAR(c) do { USR |= BV(TXC0); UDR = (c); } while(0)
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#define KDBG_MASK_IRQ(old) do { \
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(old) = UCR; \
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UCR |= BV(TXEN0); \
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UCR &= ~(BV(TXCIE0) | BV(UDRIE0)); \
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KDBG_UART0_BUS_TX; \
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} while(0)
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#define KDBG_RESTORE_IRQ(old) do { \
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KDBG_WAIT_TXDONE(); \
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KDBG_UART0_BUS_RX; \
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UCR = (old); \
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} while(0)
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typedef uint8_t kdbg_irqsave_t;
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#elif CONFIG_KDEBUG_PORT == 1
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/*
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* Support for special bus policies or external transceivers
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* on UART1 (to be overridden in "hw/hw_ser.h").
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*
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* HACK: if we don't set TXEN, kdbg disables the transmitter
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* after each output statement until the serial driver
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* is initialized. These glitches confuse the debug
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* terminal that ends up printing some trash.
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*/
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#ifndef KDBG_UART1_BUS_INIT
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#define KDBG_UART1_BUS_INIT do { \
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UCSR1B = BV(TXEN1); \
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} while (0)
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#endif
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#ifndef KDBG_UART1_BUS_RX
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#define KDBG_UART1_BUS_RX do {} while (0)
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#endif
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#ifndef KDBG_UART1_BUS_TX
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#define KDBG_UART1_BUS_TX do {} while (0)
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#endif
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#define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR1A, UDRE1); } while(0)
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#define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR1A, TXC1); } while(0)
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#define KDBG_WRITE_CHAR(c) do { UCSR1A |= BV(TXC1); UDR1 = (c); } while(0)
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#define KDBG_MASK_IRQ(old) do { \
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(old) = UCSR1B; \
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UCSR1B |= BV(TXEN1); \
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UCSR1B &= ~(BV(TXCIE1) | BV(UDRIE1)); \
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KDBG_UART1_BUS_TX; \
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} while(0)
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#define KDBG_RESTORE_IRQ(old) do { \
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KDBG_WAIT_TXDONE(); \
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KDBG_UART1_BUS_RX; \
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UCSR1B = (old); \
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} while(0)
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typedef uint8_t kdbg_irqsave_t;
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#elif CONFIG_KDEBUG_PORT == 2
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/*
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* Support for special bus policies or external transceivers
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* on UART2 (to be overridden in "hw/hw_ser.h").
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*
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* HACK: if we don't set TXEN, kdbg disables the transmitter
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* after each output statement until the serial driver
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* is initialized. These glitches confuse the debug
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* terminal that ends up printing some trash.
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*/
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#ifndef KDBG_UART2_BUS_INIT
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#define KDBG_UART2_BUS_INIT do { \
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UCSR2B = BV(TXEN2); \
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} while (0)
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#endif
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#ifndef KDBG_UART2_BUS_RX
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#define KDBG_UART2_BUS_RX do {} while (0)
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#endif
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#ifndef KDBG_UART2_BUS_TX
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#define KDBG_UART2_BUS_TX do {} while (0)
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#endif
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#define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR2A, UDRE2); } while(0)
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#define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR2A, TXC2); } while(0)
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#define KDBG_WRITE_CHAR(c) do { UCSR2A |= BV(TXC2); UDR2 = (c); } while(0)
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#define KDBG_MASK_IRQ(old) do { \
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(old) = UCSR2B; \
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UCSR2B |= BV(TXEN2); \
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UCSR2B &= ~(BV(TXCIE2) | BV(UDRIE2)); \
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KDBG_UART2_BUS_TX; \
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} while(0)
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#define KDBG_RESTORE_IRQ(old) do { \
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KDBG_WAIT_TXDONE(); \
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KDBG_UART2_BUS_RX; \
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UCSR2B = (old); \
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} while(0)
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typedef uint8_t kdbg_irqsave_t;
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#elif CONFIG_KDEBUG_PORT == 3
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/*
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* Support for special bus policies or external transceivers
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* on UART3 (to be overridden in "hw/hw_ser.h").
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*
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* HACK: if we don't set TXEN, kdbg disables the transmitter
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* after each output statement until the serial driver
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* is initialized. These glitches confuse the debug
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* terminal that ends up printing some trash.
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*/
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#ifndef KDBG_UART3_BUS_INIT
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#define KDBG_UART3_BUS_INIT do { \
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UCSR3B = BV(TXEN3); \
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} while (0)
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#endif
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#ifndef KDBG_UART3_BUS_RX
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#define KDBG_UART3_BUS_RX do {} while (0)
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#endif
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#ifndef KDBG_UART3_BUS_TX
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#define KDBG_UART3_BUS_TX do {} while (0)
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#endif
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#define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR3A, UDRE3); } while(0)
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#define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR3A, TXC3); } while(0)
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#define KDBG_WRITE_CHAR(c) do { UCSR3A |= BV(TXC3); UDR3 = (c); } while(0)
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#define KDBG_MASK_IRQ(old) do { \
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(old) = UCSR3B; \
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UCSR3B |= BV(TXEN3); \
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UCSR3B &= ~(BV(TXCIE3) | BV(UDRIE3)); \
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KDBG_UART3_BUS_TX; \
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} while(0)
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#define KDBG_RESTORE_IRQ(old) do { \
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KDBG_WAIT_TXDONE(); \
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KDBG_UART3_BUS_RX; \
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UCSR3B = (old); \
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} while(0)
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typedef uint8_t kdbg_irqsave_t;
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/*
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* Special debug port for BitBanged Serial see below for details...
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*/
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#elif CONFIG_KDEBUG_PORT == 666
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#include "hw/hw_ser.h"
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#define KDBG_WAIT_READY() do { /*nop*/ } while(0)
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#define KDBG_WRITE_CHAR(c) _kdebug_bitbang_putchar((c))
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#define KDBG_MASK_IRQ(old) do { IRQ_SAVE_DISABLE((old)); } while(0)
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#define KDBG_RESTORE_IRQ(old) do { IRQ_RESTORE((old)); } while(0)
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typedef cpu_flags_t kdbg_irqsave_t;
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#define KDBG_DELAY (((CPU_FREQ + CONFIG_KDEBUG_BAUDRATE / 2) / CONFIG_KDEBUG_BAUDRATE) + 7) / 14
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static void _kdebug_bitbang_delay(void)
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{
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unsigned long i;
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for (i = 0; i < KDBG_DELAY; i++)
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{
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NOP;
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NOP;
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NOP;
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NOP;
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NOP;
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}
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}
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/**
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* Putchar for BITBANG serial debug console.
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* Sometimes, we can't permit to use a whole serial for debugging purpose.
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* Since debug console is in output only it is useful to use a single generic I/O pin for debug.
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* This is achieved by this simple function, that shift out the data like a UART, but
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* in software :)
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* The only requirement is that SER_BITBANG_* macros will be defined somewhere (usually hw_ser.h)
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* \note All interrupts are disabled during debug prints!
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*/
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static void _kdebug_bitbang_putchar(char c)
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{
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int i;
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uint16_t data = c;
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/* Add stop bit */
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data |= 0x0100;
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/* Add start bit*/
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data <<= 1;
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/* Shift out data */
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uint16_t shift = 1;
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for (i = 0; i < 10; i++)
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{
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if (data & shift)
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SER_BITBANG_HIGH;
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else
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SER_BITBANG_LOW;
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_kdebug_bitbang_delay();
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shift <<= 1;
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}
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}
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#else
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#error CONFIG_KDEBUG_PORT should be either 0, 1, 2, 3 or 666
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#endif
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INLINE void kdbg_hw_init(void)
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{
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#if CONFIG_KDEBUG_PORT == 666
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SER_BITBANG_INIT;
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#else /* CONFIG_KDEBUG_PORT != 666 */
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/* Compute the baud rate */
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uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, CONFIG_KDEBUG_BAUDRATE) - 1;
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#if (CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281)
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#if CONFIG_KDEBUG_PORT == 0
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UBRR0H = (uint8_t)(period>>8);
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UBRR0L = (uint8_t)period;
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KDBG_UART0_BUS_INIT;
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#elif CONFIG_KDEBUG_PORT == 1
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UBRR1H = (uint8_t)(period>>8);
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UBRR1L = (uint8_t)period;
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KDBG_UART1_BUS_INIT;
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#else
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#error CONFIG_KDEBUG_PORT must be either 0 or 1
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#endif
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#elif CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
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#if CONFIG_KDEBUG_PORT == 0
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UBRR0H = (uint8_t)(period>>8);
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UBRR0L = (uint8_t)period;
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KDBG_UART0_BUS_INIT;
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#elif CONFIG_KDEBUG_PORT == 1
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UBRR1H = (uint8_t)(period>>8);
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UBRR1L = (uint8_t)period;
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KDBG_UART1_BUS_INIT;
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#elif CONFIG_KDEBUG_PORT == 2
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UBRR2H = (uint8_t)(period>>8);
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UBRR2L = (uint8_t)period;
|
||
|
|
KDBG_UART2_BUS_INIT;
|
||
|
|
#elif CONFIG_KDEBUG_PORT == 3
|
||
|
|
UBRR3H = (uint8_t)(period>>8);
|
||
|
|
UBRR3L = (uint8_t)period;
|
||
|
|
KDBG_UART3_BUS_INIT;
|
||
|
|
#else
|
||
|
|
#error CONFIG_KDEBUG_PORT must be either 0 or 1 or 2 or 3
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#elif CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
|
||
|
|
#if CONFIG_KDEBUG_PORT == 0
|
||
|
|
UBRR0H = (uint8_t)(period>>8);
|
||
|
|
UBRR0L = (uint8_t)period;
|
||
|
|
UCSR0A = 0; /* The Arduino Uno bootloader turns on U2X0 */
|
||
|
|
KDBG_UART0_BUS_INIT;
|
||
|
|
#else
|
||
|
|
#error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32
|
||
|
|
#if CONFIG_KDEBUG_PORT == 0
|
||
|
|
UBRRH = (uint8_t)(period>>8);
|
||
|
|
UBRRL = (uint8_t)period;
|
||
|
|
KDBG_UART0_BUS_INIT;
|
||
|
|
#else
|
||
|
|
#error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu
|
||
|
|
#endif
|
||
|
|
#elif CPU_AVR_ATMEGA103
|
||
|
|
#if CONFIG_KDEBUG_PORT == 0
|
||
|
|
UBRR = (uint8_t)period;
|
||
|
|
KDBG_UART0_BUS_INIT;
|
||
|
|
#else
|
||
|
|
#error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu
|
||
|
|
#endif
|
||
|
|
#else
|
||
|
|
#error Unknown CPU
|
||
|
|
#endif
|
||
|
|
#endif /* CONFIG_KDEBUG_PORT == 666 */
|
||
|
|
}
|
||
|
|
|