100 lines
2.9 KiB
ArmAsm
100 lines
2.9 KiB
ArmAsm
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/**
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* \file
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* <!--
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* This file is part of BeRTOS.
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*
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* Bertos is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* As a special exception, you may use this file as part of a free software
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* library without restriction. Specifically, if other files instantiate
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* templates or use macros or inline functions from this file, or you compile
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* this file and link it with other files to produce an executable, this
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* file does not by itself cause the resulting executable to be covered by
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* the GNU General Public License. This exception does not however
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* invalidate any other reasons why the executable file might be covered by
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* the GNU General Public License.
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*
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* Copyright 2007, 2008 Develer S.r.l. (http://www.develer.com/)
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*
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* -->
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*
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* \brief ARM context switch
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*
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*
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* \author Stefano Fedrigo <aleph@develer.com>
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* \author Francesco Sacchi <batt@develer.com>
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* \author Andrea Righi <arighi@develer.com>
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*/
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#include "cfg/cfg_proc.h"
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/* void asm_switch_context(void **new_sp [r0], void **save_sp [r1]) */
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.globl asm_switch_context
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asm_switch_context:
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/* Save registers */
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stmfd sp!, {r4 - r11, lr}
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/* Save old stack pointer */
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str sp, [r1]
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/* Load new stack pointer */
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ldr sp, [r0]
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/* Load new registers */
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ldmfd sp!, {r4 - r11, pc}
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#if CONFIG_KERN_PREEMPT
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/* ARM interrupt mode with IRQ and FIQ disabled */
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#define ARM_IRQ_MODE 0xD2
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/* ARM supervisor mode with IRQ and FIQ disabled */
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#define ARM_SVC_MODE 0xD3
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.globl asm_irq_switch_context
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asm_irq_switch_context:
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/* Return if preemption is not needed */
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bl proc_needPreempt
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cmp r0, #0
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ldmeqfd sp!, {r0 - r3, ip, pc}^
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/* Otherwise restore regs used by the ISR */
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ldmfd sp!, {r0 - r3, ip, lr}
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/* Save current process context */
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msr cpsr_c, #ARM_SVC_MODE
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stmfd sp!, {r0 - r3, ip, lr}
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/* Save lr_irq and spsr_irq in process stack */
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msr cpsr_c, #ARM_IRQ_MODE
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mov r0, lr
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mrs r1, spsr
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msr cpsr_c, #ARM_SVC_MODE
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stmfd sp!, {r0, r1}
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/* Perform the context switch */
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bl proc_preempt
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/* Restore lr_irq and spsr_irq from process stack */
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ldmfd sp!, {r0, r1}
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msr cpsr_c, #ARM_IRQ_MODE
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mov lr, r0
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msr spsr_cxsf, r1
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/* Restore process regs */
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msr cpsr_c, #ARM_SVC_MODE
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ldmfd sp!, {r0 - r3, ip, lr}
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/* Exit from ISR */
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msr cpsr_c, #ARM_IRQ_MODE
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movs pc, lr
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#endif /* CONFIG_KERN_PREEMPT */
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