107 lines
5.7 KiB
C
107 lines
5.7 KiB
C
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/**
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* \file
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* <!--
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* This file is part of BeRTOS.
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*
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* Bertos is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* As a special exception, you may use this file as part of a free software
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* library without restriction. Specifically, if other files instantiate
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* templates or use macros or inline functions from this file, or you compile
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* this file and link it with other files to produce an executable, this
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* file does not by itself cause the resulting executable to be covered by
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* the GNU General Public License. This exception does not however
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* invalidate any other reasons why the executable file might be covered by
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* the GNU General Public License.
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*
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* Copyright 2007 Develer S.r.l. (http://www.develer.com/)
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*
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* -->
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*
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*
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* \author Francesco Sacchi <batt@develer.com>
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*
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* AT91 Debug unit.
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* This file is based on NUT/OS implementation. See license below.
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*/
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/*
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* Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holders nor the names of
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
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* SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
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* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* For additional information see http://www.ethernut.de/
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*/
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#ifndef AT91_DBGU_H
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#define AT91_DBGU_H
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#define DBGU_CR (*((reg32_t *)(DBGU_BASE + US_CR_OFF))) ///<DBGU control register address.
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#define DBGU_MR (*((reg32_t *)(DBGU_BASE + US_MR_OFF))) ///<DBGU mode register address.
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#define DBGU_IER (*((reg32_t *)(DBGU_BASE + US_IER_OFF))) ///<DBGU interrupt enable register address.
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#define DBGU_IDR (*((reg32_t *)(DBGU_BASE + US_IDR_OFF))) ///<DBGU interrupt disable register address.
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#define DBGU_IMR (*((reg32_t *)(DBGU_BASE + US_IMR_OFF))) ///<DBGU interrupt mask register address.
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#define DBGU_SR (*((reg32_t *)(DBGU_BASE + US_CSR_OFF))) ///<DBGU status register address.
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#define DBGU_RHR (*((reg32_t *)(DBGU_BASE + US_RHR_OFF))) ///<DBGU receiver holding register address.
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#define DBGU_THR (*((reg32_t *)(DBGU_BASE + US_THR_OFF))) ///<DBGU transmitter holding register address.
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#define DBGU_BRGR (*((reg32_t *)(DBGU_BASE + US_BRGR_OFF))) ///<DBGU baud rate register address.
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#define DBGU_CIDR_OFF 0x00000040 ///<DBGU chip ID register offset.
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#define DBGU_CIDR (*((reg32_t *)(DBGU_BASE + DBGU_CIDR_OFF))) ///<DBGU chip ID register.
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#define DBGU_EXID_OFF 0x00000044 ///<DBGU chip ID extension register offset.
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#define DBGU_EXID (*((reg32_t *)(DBGU_BASE + DBGU_EXID_OFF))) ///<DBGU chip ID extension register.
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#define DBGU_FNR_OFF 0x00000048 ///<DBGU force NTRST register offset.
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#define DBGU_FNR (*((reg32_t *)(DBGU_BASE + DBGU_FNR_OFF))) ///<DBGU force NTRST register.
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#if defined(DBGU_HAS_PDC)
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#define DBGU_RPR (*((reg32_t *)(DBGU_BASE + PERIPH_RPR_OFF))) ///<PDC receive pointer register.
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#define DBGU_RCR (*((reg32_t *)(DBGU_BASE + PERIPH_RCR_OFF))) ///<PDC receive counter register.
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#define DBGU_TPR (*((reg32_t *)(DBGU_BASE + PERIPH_TPR_OFF))) ///<PDC transmit pointer register.
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#define DBGU_TCR (*((reg32_t *)(DBGU_BASE + PERIPH_TCR_OFF))) ///<PDC transmit counter register.
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#define DBGU_RNPR (*((reg32_t *)(DBGU_BASE + PERIPH_RNPR_OFF))) ///<PDC receive next pointer register.
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#define DBGU_RNCR (*((reg32_t *)(DBGU_BASE + PERIPH_RNCR_OFF))) ///<PDC receive next counter register.
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#define DBGU_TNPR (*((reg32_t *)(DBGU_BASE + PERIPH_TNPR_OFF))) ///<PDC transmit next pointer register.
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#define DBGU_TNCR (*((reg32_t *)(DBGU_BASE + PERIPH_TNCR_OFF))) ///<PDC transmit next counter register.
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#define DBGU_PTCR (*((reg32_t *)(DBGU_BASE + PERIPH_PTCR_OFF))) ///<PDC transfer control register.
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#define DBGU_PTSR (*((reg32_t *)(DBGU_BASE + PERIPH_PTSR_OFF))) ///<PDC transfer status register.
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#endif
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#endif /* AT91_DBGU_H */
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