111 lines
3.1 KiB
C
111 lines
3.1 KiB
C
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/**
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* \file
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* <!--
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* This file is part of BeRTOS.
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*
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* Bertos is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* As a special exception, you may use this file as part of a free software
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* library without restriction. Specifically, if other files instantiate
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* templates or use macros or inline functions from this file, or you compile
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* this file and link it with other files to produce an executable, this
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* file does not by itself cause the resulting executable to be covered by
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* the GNU General Public License. This exception does not however
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* invalidate any other reasons why the executable file might be covered by
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* the GNU General Public License.
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*
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* Copyright 2007, 2010 Develer S.r.l. (http://www.develer.com/)
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*
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* -->
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*
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*
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* \author Daniele Basile <asterix@develer.com>
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* \author Luca Ottaviano <lottaviano@develer.com>
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*
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* \brief Low-level serial module for AVR MEGA(interface).
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*
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*/
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#ifndef DRV_SER_MEGA_H
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#define DRV_SER_MEGA_H
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#include <cfg/macros.h> /* BV() */
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#include <cfg/compiler.h> /* uint32_t */
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typedef uint8_t serstatus_t;
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/* Software errors */
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#define SERRF_RXFIFOOVERRUN BV(0) /**< Rx FIFO buffer overrun */
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#define SERRF_RXTIMEOUT BV(5) /**< Receive timeout */
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#define SERRF_TXTIMEOUT BV(6) /**< Transmit timeout */
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/*
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* Hardware errors.
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* These flags map directly to the AVR UART Status Register (USR).
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*/
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#define SERRF_RXSROVERRUN BV(3) /**< Rx shift register overrun */
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#define SERRF_FRAMEERROR BV(4) /**< Stop bit missing */
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#define SERRF_PARITYERROR BV(7) /**< Parity error */
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#define SERRF_NOISEERROR 0 /**< Unsupported */
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/**
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* SPI clock polarity.
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*
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* $WIZ$ ser_spi_pol = "SPI_NORMAL_LOW", "SPI_NORMAL_HIGH"
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* }
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*/
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#define SPI_NORMAL_LOW 0
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#define SPI_NORMAL_HIGH 1
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/**
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* SPI clock phase.
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*
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* $WIZ$ ser_spi_phase = "SPI_SAMPLE_ON_FIRST_EDGE", "SPI_SAMPLE_ON_SECOND_EDGE"
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* }
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*/
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#define SPI_SAMPLE_ON_FIRST_EDGE 0
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#define SPI_SAMPLE_ON_SECOND_EDGE 1
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/**
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* \name Serial hw numbers
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*
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* \{
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*/
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enum
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{
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#if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560
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SER_UART0,
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SER_UART1,
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SER_UART2,
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SER_UART3,
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SER_SPI,
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#elif CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281
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SER_UART0,
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SER_UART1,
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SER_SPI,
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#elif CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA168 \
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|| CPU_AVR_ATMEGA328P
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SER_UART0,
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SER_SPI,
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#else
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#error unknown architecture
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#endif
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SER_CNT /**< Number of serial ports */
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};
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/*\}*/
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#endif /* DRV_SER_MEGA_H */
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