98 lines
2.7 KiB
C
98 lines
2.7 KiB
C
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/**
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* \file
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* <!--
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* This file is part of BeRTOS.
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*
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* Bertos is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* As a special exception, you may use this file as part of a free software
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* library without restriction. Specifically, if other files instantiate
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* templates or use macros or inline functions from this file, or you compile
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* this file and link it with other files to produce an executable, this
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* file does not by itself cause the resulting executable to be covered by
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* the GNU General Public License. This exception does not however
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* invalidate any other reasons why the executable file might be covered by
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* the GNU General Public License.
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*
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* Copyright 2010 Develer S.r.l. (http://www.develer.com/)
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* All Rights Reserved.
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* -->
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*
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* \brief AFSK modem hardware-specific definitions.
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*
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*
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* \author Francesco Sacchi <batt@develer.com>
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*/
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#include "hw_afsk.h"
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#include <net/afsk.h>
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#include <cpu/irq.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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/*
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* Here we are using only one modem. If you need to receive
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* from multiple modems, you need to define an array of contexts.
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*/
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static Afsk *ctx;
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void hw_afsk_adcInit(int ch, Afsk *_ctx)
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{
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ctx = _ctx;
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ASSERT(ch <= 5);
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AFSK_STROBE_INIT();
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AFSK_STROBE_OFF();
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/* Set prescaler to clk/8 (2 MHz), CTC, top = ICR1 */
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TCCR1A = 0;
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TCCR1B = BV(CS11) | BV(WGM13) | BV(WGM12);
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/* Set max value to obtain a 9600Hz freq */
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ICR1 = ((CPU_FREQ / 8) / 9600) - 1;
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/* Set reference to AVCC (5V), select CH */
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ADMUX = BV(REFS0) | ch;
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DDRC &= ~BV(ch);
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PORTC &= ~BV(ch);
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DIDR0 |= BV(ch);
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/* Set autotrigger on Timer1 Input capture flag */
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ADCSRB = BV(ADTS2) | BV(ADTS1) | BV(ADTS0);
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/* Enable ADC, autotrigger, 1MHz, IRQ enabled */
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/* We are using the ADC a bit out of specifications otherwise it's not fast enough for our
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* purposes */
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ADCSRA = BV(ADEN) | BV(ADSC) | BV(ADATE) | BV(ADIE) | BV(ADPS2);
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}
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bool hw_afsk_dac_isr;
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/*
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* This is how you declare an ISR.
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*/
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DECLARE_ISR(ADC_vect)
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{
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TIFR1 = BV(ICF1);
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afsk_adc_isr(ctx, ((int16_t)((ADC) >> 2) - 128));
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if (hw_afsk_dac_isr)
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PORTD = afsk_dac_isr(ctx) & 0xF0;
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else
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PORTD = 128;
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}
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