171 lines
4.3 KiB
C
171 lines
4.3 KiB
C
/**
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* \file
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* <!--
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* This file is part of BeRTOS.
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*
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* Bertos is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* As a special exception, you may use this file as part of a free software
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* library without restriction. Specifically, if other files instantiate
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* templates or use macros or inline functions from this file, or you compile
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* this file and link it with other files to produce an executable, this
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* file does not by itself cause the resulting executable to be covered by
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* the GNU General Public License. This exception does not however
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* invalidate any other reasons why the executable file might be covered by
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* the GNU General Public License.
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*
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* Copyright 2008 Develer S.r.l. (http://www.develer.com/)
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*
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* -->
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*
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* \brief SPI driver with DMA.
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*
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* \author Francesco Sacchi <batt@develer.com>
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* \author Luca Ottaviano <lottaviano@develer.com>
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*/
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#include <drv/spi_dma.h>
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#include "cfg/cfg_spi_dma.h"
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#include "hw/hw_spi_dma.h"
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#include <io/at91sam7.h>
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#include <io/kfile.h>
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#include <struct/fifobuf.h>
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#include <struct/kfile_fifo.h>
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#include <drv/timer.h>
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#include <cpu/attr.h>
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#include <cpu/power.h>
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#include <string.h> /* memset */
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void spi_dma_setclock(uint32_t rate)
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{
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SPI0_CSR0 &= ~SPI_SCBR;
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ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate));
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SPI0_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT;
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}
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static int spi_dma_flush(UNUSED_ARG(struct KFile *, fd))
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{
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/* Wait for DMA to finish */
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while (!(SPI0_SR & BV(SPI_TXBUFE)))
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cpu_relax();
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/* Wait until last bit has been shifted out */
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while (!(SPI0_SR & BV(SPI_TXEMPTY)))
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cpu_relax();
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return 0;
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}
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static size_t spi_dma_write(struct KFile *fd, const void *_buf, size_t size)
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{
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SPI0_PTCR = BV(PDC_TXTDIS);
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SPI0_TPR = (reg32_t)_buf;
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SPI0_TCR = size;
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SPI0_PTCR = BV(PDC_TXTEN);
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spi_dma_flush(fd);
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return size;
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}
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/*
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* Dummy buffer used to transmit 0xff chars while receiving data.
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* This buffer is completetly constant and the compiler should allocate it
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* in flash memory.
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*/
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static const uint8_t tx_dummy_buf[CONFIG_SPI_DMA_MAX_RX] = { [0 ... (CONFIG_SPI_DMA_MAX_RX - 1)] = 0xFF };
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static size_t spi_dma_read(UNUSED_ARG(struct KFile *, fd), void *_buf, size_t size)
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{
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size_t count, total_rx = 0;
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uint8_t *buf = (uint8_t *)_buf;
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while (size)
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{
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count = MIN(size, (size_t)CONFIG_SPI_DMA_MAX_RX);
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SPI0_PTCR = BV(PDC_TXTDIS) | BV(PDC_RXTDIS);
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SPI0_RPR = (reg32_t)buf;
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SPI0_RCR = count;
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SPI0_TPR = (reg32_t)tx_dummy_buf;
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SPI0_TCR = count;
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/* Avoid reading the previous sent char */
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*buf = SPI0_RDR;
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/* Start transfer */
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SPI0_PTCR = BV(PDC_RXTEN) | BV(PDC_TXTEN);
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/* wait for transfer to finish */
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while (!(SPI0_SR & BV(SPI_ENDRX)))
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cpu_relax();
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size -= count;
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total_rx += count;
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buf += count;
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}
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SPI0_PTCR = BV(PDC_RXTDIS) | BV(PDC_TXTDIS);
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return total_rx;
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}
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#define SPI_DMA_IRQ_PRIORITY 4
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void spi_dma_init(SpiDma *spi)
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{
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/* Disable PIO on SPI pins */
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PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO);
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/* Reset device */
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SPI0_CR = BV(SPI_SWRST);
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/*
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* Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device,
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* SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0
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*/
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SPI0_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS);
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/*
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* Set SPI mode.
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* At reset clock division factor is set to 0, that is
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* *forbidden*. Set SPI clock to minimum to keep it valid.
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*/
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SPI0_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT);
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/* Disable all irqs */
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SPI0_IDR = 0xFFFFFFFF;
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/* Enable SPI clock. */
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PMC_PCER = BV(SPI0_ID);
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/* Enable SPI */
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SPI0_CR = BV(SPI_SPIEN);
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DB(spi->fd._type = KFT_SPIDMA);
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spi->fd.write = spi_dma_write;
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spi->fd.read = spi_dma_read;
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spi->fd.flush = spi_dma_flush;
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SPI_DMA_STROBE_INIT();
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}
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