115 lines
4.6 KiB
C
115 lines
4.6 KiB
C
/**
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* \file
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* <!--
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* This file is part of BeRTOS.
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*
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* Bertos is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* As a special exception, you may use this file as part of a free software
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* library without restriction. Specifically, if other files instantiate
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* templates or use macros or inline functions from this file, or you compile
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* this file and link it with other files to produce an executable, this
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* file does not by itself cause the resulting executable to be covered by
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* the GNU General Public License. This exception does not however
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* invalidate any other reasons why the executable file might be covered by
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* the GNU General Public License.
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*
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* Copyright 2007 Develer S.r.l. (http://www.develer.com/)
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*
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* -->
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*
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*
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* \author Francesco Sacchi <batt@develer.com>
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*
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* AT91 periodic interval timer.
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* This file is based on NUT/OS implementation. See license below.
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*/
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/*
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* Copyright (C) 2007 by egnite Software GmbH. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holders nor the names of
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
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* SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
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* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* For additional information see http://www.ethernut.de/
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*/
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#ifndef AT91_PIT_H
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#define AT91_PIT_H
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#include <cfg/compiler.h>
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/**
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*Periodic Inverval Timer Mode Register
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*\{
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*/
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#define PIT_MR_OFF 0x00000000 ///< Mode register offset.
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#define PIT_MR (*((reg32_t *)(PIT_BASE + PIT_MR_OFF))) ///< Mode register address.
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#define PIV_MASK 0x000FFFFF ///< Periodic interval value mask.
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#define PIV_SHIFT 0 ///< Periodic interval value shift.
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#define PITEN 24 ///< Periodic interval timer enable.
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#define PITIEN 25 ///< Periodic interval timer interrupt enable.
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/*\}*/
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/**
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* Periodic Inverval Timer Status Register
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*\{
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*/
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#define PIT_SR_OFF 0x00000004 ///< Status register offset.
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#define PIT_SR (*((reg32_t *)(PIT_BASE + PIT_SR_OFF))) ///< Status register address.
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#define PITS 0 ///< Timer has reached PIV.
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/*\}*/
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/**
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* Periodic Inverval Timer Value and Image Registers
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*\{
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*/
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#define PIVR_OFF 0x00000008 ///< Value register offset.
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#define PIVR (*((reg32_t *)(PIT_BASE + PIVR_OFF))) ///< Value register address.
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#define PIIR_OFF 0x0000000C ///< Image register offset.
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#define PIIR (*((reg32_t *)(PIT_BASE + PIIR_OFF))) ///< Image register address.
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#define CPIV_MASK 0x000FFFFF ///< Current periodic interval value mask.
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#define CPIV_SHIFT 0 ///< Current periodic interval value SHIFT.
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#define PICNT_MASK 0xFFF00000 ///< Periodic interval counter mask.
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#define PICNT_SHIFT 20 ///< Periodic interval counter LSB.
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/*\}*/
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#endif /* AT91_PIT_H */
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