139 lines
4.3 KiB
C
139 lines
4.3 KiB
C
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/**
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* \file
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* <!--
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* This file is part of BeRTOS.
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*
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* Bertos is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* As a special exception, you may use this file as part of a free software
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* library without restriction. Specifically, if other files instantiate
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* templates or use macros or inline functions from this file, or you compile
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* this file and link it with other files to produce an executable, this
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* file does not by itself cause the resulting executable to be covered by
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* the GNU General Public License. This exception does not however
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* invalidate any other reasons why the executable file might be covered by
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* the GNU General Public License.
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*
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* Copyright 2011 Develer S.r.l. (http://www.develer.com/)
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* -->
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*
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* \brief ONFI 1.0 compliant NAND kblock driver
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*
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* \author Stefano Fedrigo <aleph@develer.com>
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*
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* $WIZ$ module_name = "nand"
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* $WIZ$ module_depends = "timer", "kblock", "heap"
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* $WIZ$ module_configuration = "bertos/cfg/cfg_nand.h"
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*
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*/
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#ifndef DRV_NAND_H
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#define DRV_NAND_H
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#include "cfg/cfg_nand.h"
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#include <io/kblock.h>
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// Define log settings for cfg/log.h
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#define LOG_LEVEL CONFIG_NAND_LOG_LEVEL
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#define LOG_FORMAT CONFIG_NAND_LOG_FORMAT
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/**
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* \name Error codes.
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* \{
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*/
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#define NAND_ERR_ERASE BV(1) ///< Error erasing a block
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#define NAND_ERR_WRITE BV(2) ///< Error writing a page
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#define NAND_ERR_RD_TMOUT BV(3) ///< Read timeout
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#define NAND_ERR_WR_TMOUT BV(4) ///< Write timeout
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#define NAND_ERR_ECC BV(5) ///< Unrecoverable ECC error
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/** \} */
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// NAND commands
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#define NAND_CMD_READ_1 0x00
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#define NAND_CMD_READ_2 0x30
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#define NAND_CMD_COPYBACK_READ_1 0x00
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#define NAND_CMD_COPYBACK_READ_2 0x35
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#define NAND_CMD_COPYBACK_PROGRAM_1 0x85
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#define NAND_CMD_COPYBACK_PROGRAM_2 0x10
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#define NAND_CMD_RANDOM_OUT 0x05
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#define NAND_CMD_RANDOM_OUT_2 0xE0
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#define NAND_CMD_RANDOM_IN 0x85
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#define NAND_CMD_READID 0x90
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#define NAND_CMD_WRITE_1 0x80
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#define NAND_CMD_WRITE_2 0x10
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#define NAND_CMD_ERASE_1 0x60
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#define NAND_CMD_ERASE_2 0xD0
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#define NAND_CMD_STATUS 0x70
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#define NAND_CMD_RESET 0xFF
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/**
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* NAND context.
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*/
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typedef struct Nand
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{
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KBlock fd; // KBlock descriptor
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uint8_t chip_select; // Chip select where NAND is connected
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uint8_t status; // Status bitmap
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uint16_t *block_map; // For bad blocks remapping
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uint16_t remap_start; // First unused remap block
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} Nand;
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/*
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* Kblock id.
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*/
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#define KBT_NAND MAKE_ID('N', 'A', 'N', 'D')
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/**
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* Convert + ASSERT from generic KBlock to NAND context.
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*/
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INLINE Nand *NAND_CAST(KBlock *kb)
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{
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ASSERT(kb->priv.type == KBT_NAND);
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return (Nand *)kb;
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}
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struct Heap;
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// Kblock interface
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bool nand_init(Nand *chip, struct Heap *heap, unsigned chip_select);
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bool nand_initUnbuffered(Nand *chip, struct Heap *heap, unsigned chip_select);
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// NAND specific functions
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bool nand_getDevId(Nand *chip, uint8_t dev_id[5]);
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int nand_blockErase(Nand *chip, uint16_t block);
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void nand_format(Nand *chip);
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#ifdef _DEBUG
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void nand_ruinSomeBlocks(Nand *chip);
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#endif
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// Hardware specific functions, implemented by cpu specific module
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bool nand_waitReadyBusy(Nand *chip, time_t timeout);
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bool nand_waitTransferComplete(Nand *chip, time_t timeout);
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void nand_sendCommand(Nand *chip, uint32_t cmd1, uint32_t cmd2,
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int num_cycles, uint32_t cycle0, uint32_t cycle1234);
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uint8_t nand_getChipStatus(Nand *chip);
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void *nand_dataBuffer(Nand *chip);
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bool nand_checkEcc(Nand *chip);
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void nand_computeEcc(Nand *chip, const void *buf, size_t size, uint32_t *ecc, size_t ecc_size);
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void nand_hwInit(Nand *chip);
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#endif /* DRV_NAND_H */
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