From 3265f99e8fc421dad61bae351393e147585a831f Mon Sep 17 00:00:00 2001
From: Mark Qvist <markq@qvistconsult.com>
Date: Thu, 3 Apr 2014 23:45:41 +0200
Subject: [PATCH] Reworked afsk init. Found the error :P

---
 Modem/afsk.c | 52 ++++++++++++++++++++++++++--------------------------
 Modem/afsk.h |  8 ++++----
 buildrev.h   |  2 +-
 3 files changed, 31 insertions(+), 31 deletions(-)

diff --git a/Modem/afsk.c b/Modem/afsk.c
index 237d517..c0a8188 100644
--- a/Modem/afsk.c
+++ b/Modem/afsk.c
@@ -237,7 +237,7 @@ void afsk_adc_isr(Afsk *af, int8_t curr_sample)
 		 * a 1 is received, otherwise it's a 0.
 		 */
 		if (!hdlcParse(&af->hdlc, !EDGE_FOUND(af->actualBits), &af->rxFifo))
-			af->status |= AFSK_RXFIFO_OVERRUN;
+			af->status |= RX_OVERRUN;
 	}
 
 
@@ -459,34 +459,34 @@ static void afsk_clearerr(KFile *fd)
 	ATOMIC(af->status = 0);
 }
 
-void afsk_init(Afsk *af, int adcPin, int dacPin)
-{
-	#if CONFIG_AFSK_RXTIMEOUT != -1
-	MOD_CHECK(timer);
-	#endif
-	memset(af, 0, sizeof(*af));
-	af->adcPin = adcPin;
-	af->dacPin = dacPin;
+void afsk_init(Afsk *afsk, int _adcPin, int _dacPin) {
+	// Allocate memory for struct
+	memset(afsk, 0, sizeof(*afsk));
 
-	fifo_init(&af->delayFifo, (uint8_t *)af->delay_buf, sizeof(af->delay_buf));
-	fifo_init(&af->rxFifo, af->rx_buf, sizeof(af->rx_buf));
+	// Configure pins
+	afsk->adcPin = _adcPin;
+	afsk->dacPin = _dacPin;
+	afsk->phaseInc = MARK_INC;
 
-	/* Fill sample FIFO with 0 */
-	for (int i = 0; i < SAMPLESPERBIT / 2; i++)
-		fifo_push(&af->delayFifo, 0);
+	// Init FIFO buffers
+	fifo_init(&afsk->delayFifo, (uint8_t *)afsk->delayBuf, sizeof(afsk->delayBuf));
+	fifo_init(&afsk->rxFifo, afsk->rxBuf, sizeof(afsk->rxBuf));
+	fifo_init(&afsk->txFifo, afsk->txBuf, sizeof(afsk->txBuf));
 
-	fifo_init(&af->txFifo, af->tx_buf, sizeof(af->tx_buf));
+	// Fill delay FIFO with zeroes
+	for (int i = 0; i<SAMPLESPERBIT / 2; i++) {
+		fifo_push(&afsk->delayFifo, 0);
+	}
 
-	AFSK_ADC_INIT(adcPin, af);
-	AFSK_DAC_INIT(dacPin, af);
+	// Init DAC & ADC
+	AFSK_ADC_INIT(_adcPin, afsk);
+	AFSK_DAC_INIT(_dacPin, afsk);
 	AFSK_STROBE_INIT();
-	//LOG_INFO("MARK_INC %d, SPACE_INC %d\n", MARK_INC, SPACE_INC);
 
-	DB(af->fd._type = KFT_AFSK);
-	af->fd.write = afsk_write;
-	af->fd.read = afsk_read;
-	af->fd.flush = afsk_flush;
-	af->fd.error = afsk_error;
-	af->fd.clearerr = afsk_clearerr;
-	af->phaseInc = MARK_INC;
-}
+	DB(afsk->fd._type = KFT_AFSK);
+	afsk->fd.write = afsk_write;
+	afsk->fd.read = afsk_read;
+	afsk->fd.flush = afsk_flush;
+	afsk->fd.error = afsk_error;
+	afsk->fd.clearerr = afsk_clearerr;	
+}
\ No newline at end of file
diff --git a/Modem/afsk.h b/Modem/afsk.h
index ff74750..d6fa4f9 100644
--- a/Modem/afsk.h
+++ b/Modem/afsk.h
@@ -22,7 +22,7 @@ typedef struct Hdlc
 	bool receiving;				// Whether or not where actually receiving data (or just noise ;P)
 } Hdlc;
 
-#define AFSK_RXFIFO_OVERRUN BV(0)
+#define RX_OVERRUN BV(0)
 
 typedef struct Afsk
 {
@@ -49,16 +49,16 @@ typedef struct Afsk
 	uint16_t phaseInc;						// Phase increment per sample
 
 	FIFOBuffer txFifo;						// FIFO for transmit data
-	uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN];	// Actial data storage for said FIFO
+	uint8_t txBuf[CONFIG_AFSK_TX_BUFLEN];	// Actial data storage for said FIFO
 
 	volatile bool sending;					// Set when modem is sending
 
 	// Demodulation values
 	FIFOBuffer delayFifo;					// Delayed FIFO for frequency discrimination
-	int8_t delay_buf[SAMPLESPERBIT / 2 + 1];// Actual data storage for said FIFO
+	int8_t delayBuf[SAMPLESPERBIT / 2 + 1];// Actual data storage for said FIFO
 
 	FIFOBuffer rxFifo;						// FIFO for received data
-	uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN];	// Actual data storage for said FIFO
+	uint8_t rxBuf[CONFIG_AFSK_RX_BUFLEN];	// Actual data storage for said FIFO
 
 	int16_t iirX[2];						// IIR Filter X cells
 	int16_t iirY[2];						// IIR Filter Y cells
diff --git a/buildrev.h b/buildrev.h
index e0e494e..6dfedb9 100644
--- a/buildrev.h
+++ b/buildrev.h
@@ -1,2 +1,2 @@
-#define VERS_BUILD 51
+#define VERS_BUILD 76
 #define VERS_HOST  "vixen"