Removed stuff
This commit is contained in:
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268d592c22
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6b6042462c
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@ -1,11 +1,8 @@
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#include "afsk.h"
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#include "afsk.h"
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//#include <net/ax25.h>
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#include "config.h"
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#include "config.h"
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#include "hardware.h"
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#include "hardware.h"
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#include <drv/timer.h>
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#include <drv/timer.h>
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#include <cfg/module.h>
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#include <cfg/module.h>
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#define HDLC_FLAG 0x7E
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#define HDLC_FLAG 0x7E
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107
Modem/afsk.h
107
Modem/afsk.h
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@ -12,27 +12,10 @@
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#include <struct/fifobuf.h>
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#include <struct/fifobuf.h>
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/**
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* ADC sample rate.
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* The demodulator filters are designed to work at this frequency.
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* If you need to change this remember to update afsk_adc_isr().
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*/
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#define SAMPLERATE 9600
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#define SAMPLERATE 9600
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/**
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* Bitrate of the received/transmitted data.
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* The demodulator filters and decoderes are designed to work at this frequency.
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* If you need to change this remember to update afsk_adc_isr().
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*/
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#define BITRATE 1200
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#define BITRATE 1200
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#define SAMPLEPERBIT (SAMPLERATE / BITRATE)
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#define SAMPLEPERBIT (SAMPLERATE / BITRATE)
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/**
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* HDLC (High-Level Data Link Control) context.
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* Maybe to be moved in a separate HDLC module one day.
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*/
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typedef struct Hdlc
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typedef struct Hdlc
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{
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{
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uint8_t demod_bits; ///< Bitstream from the demodulator.
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uint8_t demod_bits; ///< Bitstream from the demodulator.
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@ -41,117 +24,35 @@ typedef struct Hdlc
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bool rxstart; ///< True if an HDLC_FLAG char has been found in the bitstream.
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bool rxstart; ///< True if an HDLC_FLAG char has been found in the bitstream.
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} Hdlc;
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} Hdlc;
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/**
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* RX FIFO buffer full error.
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*/
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#define AFSK_RXFIFO_OVERRUN BV(0)
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#define AFSK_RXFIFO_OVERRUN BV(0)
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/**
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* AFSK1200 modem context.
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*/
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typedef struct Afsk
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typedef struct Afsk
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{
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{
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/** Base "class" */
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KFile fd;
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KFile fd;
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/** ADC channel to be used by the demodulator */
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int adc_ch;
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int adc_ch;
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/** DAC channel to be used by the modulator */
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int dac_ch;
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int dac_ch;
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/** Current sample of bit for output data. */
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uint8_t sample_count;
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uint8_t sample_count;
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/** Current character to be modulated */
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uint8_t curr_out;
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uint8_t curr_out;
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/** Mask of current modulated bit */
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uint8_t tx_bit;
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uint8_t tx_bit;
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/** True if bit stuff is allowed, false otherwise */
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bool bit_stuff;
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bool bit_stuff;
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/** Counter for bit stuffing */
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uint8_t stuff_cnt;
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uint8_t stuff_cnt;
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/**
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* DDS phase accumulator for generating modulated data.
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*/
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uint16_t phase_acc;
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uint16_t phase_acc;
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/** Current phase increment for current modulated bit */
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uint16_t phase_inc;
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uint16_t phase_inc;
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/** Delay line used to delay samples by (SAMPLEPERBIT / 2) */
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FIFOBuffer delay_fifo;
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FIFOBuffer delay_fifo;
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/**
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* Buffer for delay FIFO.
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* The 1 is added because the FIFO macros need
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* 1 byte more to handle a buffer (SAMPLEPERBIT / 2) bytes long.
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*/
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int8_t delay_buf[SAMPLEPERBIT / 2 + 1];
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int8_t delay_buf[SAMPLEPERBIT / 2 + 1];
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/** FIFO for received data */
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FIFOBuffer rx_fifo;
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FIFOBuffer rx_fifo;
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/** FIFO rx buffer */
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uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN];
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uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN];
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/** FIFO for transmitted data */
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FIFOBuffer tx_fifo;
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FIFOBuffer tx_fifo;
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/** FIFO tx buffer */
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uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN];
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uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN];
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/** IIR filter X cells, used to filter sampled data by the demodulator */
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int16_t iir_x[2];
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int16_t iir_x[2];
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/** IIR filter Y cells, used to filter sampled data by the demodulator */
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int16_t iir_y[2];
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int16_t iir_y[2];
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/**
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* Bits sampled by the demodulator are here.
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* Since ADC samplerate is higher than the bitrate, the bits here are
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* SAMPLEPERBIT times the bitrate.
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*/
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uint8_t sampled_bits;
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uint8_t sampled_bits;
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/**
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* Current phase, needed to know when the bitstream at ADC speed
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* should be sampled.
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*/
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int8_t curr_phase;
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int8_t curr_phase;
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/** Bits found by the demodulator at the correct bitrate speed. */
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uint8_t found_bits;
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uint8_t found_bits;
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/** True while modem sends data */
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volatile bool sending;
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volatile bool sending;
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/**
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* AFSK modem status.
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* If 0 all is ok, otherwise errors are present.
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*/
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volatile int status;
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volatile int status;
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/** Hdlc context */
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Hdlc hdlc;
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Hdlc hdlc;
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/**
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* Preamble length.
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* When the AFSK modem wants to send data, before sending the actual data,
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* shifts out preamble_len HDLC_FLAG characters.
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* This helps to synchronize the demodulator filters on the receiver side.
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*/
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uint16_t preamble_len;
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uint16_t preamble_len;
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/**
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* Trailer length.
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* After sending the actual data, the AFSK shifts out
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* trailer_len HDLC_FLAG characters.
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* This helps to synchronize the demodulator filters on the receiver side.
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*/
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uint16_t trailer_len;
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uint16_t trailer_len;
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} Afsk;
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} Afsk;
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@ -169,17 +70,11 @@ uint8_t afsk_dac_isr(Afsk *af);
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void afsk_init(Afsk *af, int adc_ch, int dac_ch);
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void afsk_init(Afsk *af, int adc_ch, int dac_ch);
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/**
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* \name Afsk filter types.
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* $WIZ$ afsk_filter_list = "AFSK_BUTTERWORTH", "AFSK_CHEBYSHEV"
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* \{
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*/
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#define AFSK_BUTTERWORTH 0
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#define AFSK_BUTTERWORTH 0
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#define AFSK_CHEBYSHEV 1
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#define AFSK_CHEBYSHEV 1
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/* \} */
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int afsk_testSetup(void);
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int afsk_testSetup(void);
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int afsk_testRun(void);
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int afsk_testRun(void);
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int afsk_testTearDown(void);
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int afsk_testTearDown(void);
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#endif /* NET_AFSK_H */
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#endif
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* $WIZ$ type = "enum"
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* $WIZ$ type = "enum"
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* $WIZ$ value_list = "log_level"
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* $WIZ$ value_list = "log_level"
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*/
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*/
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#define AFSK_LOG_LEVEL LOG_LVL_WARN
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//#define AFSK_LOG_LEVEL LOG_LVL_WARN
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/**
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/**
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* Module logging format.
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* Module logging format.
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#include <avr/interrupt.h>
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#include <avr/interrupt.h>
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/*
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* Here we are using only one modem. If you need to receive
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* from multiple modems, you need to define an array of contexts.
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*/
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static Afsk *ctx;
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static Afsk *ctx;
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void hw_afsk_adcInit(int ch, Afsk *_ctx)
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void hw_afsk_adcInit(int ch, Afsk *_ctx)
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#ifndef HW_AFSK_H
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#ifndef FSK_MODEM_HW
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#define HW_AFSK_H
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#define FSK_MODEM_HW
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#include "cfg/cfg_arch.h"
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#include "cfg/cfg_arch.h"
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void hw_afsk_adcInit(int ch, struct Afsk *_ctx);
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void hw_afsk_adcInit(int ch, struct Afsk *_ctx);
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void hw_afsk_dacInit(int ch, struct Afsk *_ctx);
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void hw_afsk_dacInit(int ch, struct Afsk *_ctx);
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/**
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* Initialize the specified channel of the ADC for AFSK needs.
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* The adc should be configured to have a continuos stream of convertions.
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* For every convertion there must be an ISR that read the sample
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* and call afsk_adc_isr(), passing the context and the sample.
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*
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* \param ch channel to be used for AFSK demodulation.
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* \param ctx AFSK context (\see Afsk). This parameter must be saved and
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* passed back to afsk_adc_isr() for every convertion.
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*/
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/*
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* This macro will be called for AFSK initialization. We could implement everything here as a macro,
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* but since initialization is rather complicated we decided to split its own function. Such function
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* is defined in hw_afsk.c.
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* Remember: since this .c file is not created by the wizard, you must add it to your_project_name.mk.
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* If you create the file using BeRTOS SDK, it will be added for you.
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*/
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#define AFSK_ADC_INIT(ch, ctx) hw_afsk_adcInit(ch, ctx)
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#define AFSK_ADC_INIT(ch, ctx) hw_afsk_adcInit(ch, ctx)
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/*
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* Activate strobe pin. We use it for debugging purposes. If you don't use it, simply
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* leave empty the following macros
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*/
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#define AFSK_STROBE_INIT() do { DDRB |= BV(5); } while (0)
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#define AFSK_STROBE_INIT() do { DDRB |= BV(5); } while (0)
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/*
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* Set the pin high. This macro is called at the beginning of the interrupt routine
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*/
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#define AFSK_STROBE_ON() do { PORTB |= BV(5); } while (0)
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#define AFSK_STROBE_ON() do { PORTB |= BV(5); } while (0)
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/*
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* Set the pin low. This macro is called at the end of the interrupt routine
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*/
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#define AFSK_STROBE_OFF() do { PORTB &= ~BV(5); } while (0)
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#define AFSK_STROBE_OFF() do { PORTB &= ~BV(5); } while (0)
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/**
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// Initialization, start and stop for DAC
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* Initialize the specified channel of the DAC for AFSK needs.
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* The DAC has to be configured in order to call an ISR for every sample sent.
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* The DAC doesn't have to start the IRQ immediatly but have to wait
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* the AFSK driver to call AFSK_DAC_IRQ_START().
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* The ISR must then call afsk_dac_isr() passing the AFSK context.
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* \param ch DAC channel to be used for AFSK modulation.
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* \param ctx AFSK context (\see Afsk). This parameter must be saved and
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* passed back to afsk_dac_isr() for every convertion.
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*/
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#define AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; DDRD |= 0xF0; DDRB |= BV(3); } while (0)
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#define AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; DDRD |= 0xF0; DDRB |= BV(3); } while (0)
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/**
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* Start DAC convertions on channel \a ch.
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* \param ch DAC channel.
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*/
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#define AFSK_DAC_IRQ_START(ch) do { (void)ch; extern bool hw_afsk_dac_isr; PORTB |= BV(3); hw_afsk_dac_isr = true; } while (0)
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#define AFSK_DAC_IRQ_START(ch) do { (void)ch; extern bool hw_afsk_dac_isr; PORTB |= BV(3); hw_afsk_dac_isr = true; } while (0)
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/**
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* Stop DAC convertions on channel \a ch.
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* \param ch DAC channel.
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*/
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#define AFSK_DAC_IRQ_STOP(ch) do { (void)ch; extern bool hw_afsk_dac_isr; PORTB &= ~BV(3); hw_afsk_dac_isr = false; } while (0)
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#define AFSK_DAC_IRQ_STOP(ch) do { (void)ch; extern bool hw_afsk_dac_isr; PORTB &= ~BV(3); hw_afsk_dac_isr = false; } while (0)
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#endif /* HW_AFSK_H */
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#endif
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@ -1,2 +1,2 @@
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#define VERS_BUILD 6
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#define VERS_BUILD 10
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#define VERS_HOST "vixen"
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#define VERS_HOST "vixen"
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