300 baud optimisations
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@ -410,7 +410,18 @@ void AFSK_adc_isr(Afsk *afsk, int8_t currentSample) {
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afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) / IIR_GAIN;
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afsk->iirY[0] = afsk->iirY[1];
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afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + (afsk->iirY[0] / IIR_POLE);
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#elif FILTER_CUTOFF == 155
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#define IIR_GAIN 6 // Really 5.99865959
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#define IIR_POLE 2 // Really Y[0] * 0.6665921828
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afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) / IIR_GAIN;
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afsk->iirY[0] = afsk->iirY[1];
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afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + (afsk->iirY[0] / IIR_POLE);
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#elif FILTER_CUTOFF == 100
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#define IIR_GAIN 9 // Really 8.763507115
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#define IIR_POLE 0.77 // Really Y[0] * 0.7717808665
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afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) / IIR_GAIN;
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afsk->iirY[0] = afsk->iirY[1];
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afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + (afsk->iirY[0] * IIR_POLE);
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#else
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#error Unsupported filter cutoff!
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#endif
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@ -422,7 +433,12 @@ void AFSK_adc_isr(Afsk *afsk, int8_t currentSample) {
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afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) / IIR_GAIN;
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afsk->iirY[0] = afsk->iirY[1];
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afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + (afsk->iirY[0] / IIR_POLE);
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#elif FILTER_CUTOFF == 200
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#define IIR_GAIN 9 // Really 8.763507115
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#define IIR_POLE 2 // Really Y[0] * 0.7717808665
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afsk->iirX[1] = ((int8_t)fifo_pop(&afsk->delayFifo) * currentSample) / IIR_GAIN;
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afsk->iirY[0] = afsk->iirY[1];
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afsk->iirY[1] = afsk->iirX[0] + afsk->iirX[1] + ((afsk->iirY[0] / 4) * 3);
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#else
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#error Unsupported filter cutoff!
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#endif
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@ -510,6 +526,7 @@ void AFSK_adc_isr(Afsk *afsk, int8_t currentSample) {
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afsk->actualBits |= 1;
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}
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if (!hdlcParse(&afsk->hdlc, !TRANSITION_FOUND(afsk->actualBits), &afsk->rxFifo)) {
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afsk->status |= 1;
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if (fifo_isfull(&afsk->rxFifo)) {
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@ -39,10 +39,10 @@ inline static uint8_t sinSample(uint16_t i) {
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#define CPU_FREQ F_CPU
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#define BITRATE 1200
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#define BITRATE 300
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#if BITRATE == 300
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#define CONFIG_ADC_SAMPLERATE 9600UL
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#define CONFIG_ADC_SAMPLERATE 4800UL
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#define CONFIG_DAC_SAMPLERATE 19200UL
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#define CLOCK_TICKS_PER_10_MS 96
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#elif BITRATE == 1200
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@ -80,7 +80,6 @@ inline static uint8_t sinSample(uint16_t i) {
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#define DAC_SAMPLESPERBIT (CONFIG_DAC_SAMPLERATE / BITRATE)
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#define DAC_TICKS_BETWEEN_SAMPLES ((((CPU_FREQ+FREQUENCY_CORRECTION)) / CONFIG_DAC_SAMPLERATE) - 1)
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// TODO: Maybe revert to only looking at two samples
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#if BITRATE == 300
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#define SIGNAL_TRANSITIONED(bits) DUAL_XOR((bits), (bits) >> 2)
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#elif BITRATE == 1200
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@ -94,15 +93,14 @@ inline static uint8_t sinSample(uint16_t i) {
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#endif
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#if BITRATE == 300
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// TODO: Real-world tests on which resolution is best
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//#define PHASE_BITS 8
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#define PHASE_BITS 4
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#define PHASE_BITS 1
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#else
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#define PHASE_BITS 8 // Sub-sample phase counter resolution
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#endif
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#define PHASE_INC 1 // Nudge by above resolution for each adjustment
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#define PHASE_MAX (ADC_SAMPLESPERBIT * PHASE_BITS) // Size of our phase counter
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// TODO: Test which target is best in real world
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@ -113,15 +111,15 @@ inline static uint8_t sinSample(uint16_t i) {
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#if CONFIG_ADC_SAMPLERATE == 19200
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#define PHASE_THRESHOLD (PHASE_MAX / 2)+3*PHASE_BITS // Target transition point of our phase window
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#elif CONFIG_ADC_SAMPLERATE == 9600
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#define PHASE_THRESHOLD (PHASE_MAX / 2) // 64 // Target transition point of our phase window
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#define PHASE_THRESHOLD (PHASE_MAX / 2) // Target transition point of our phase window
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#endif
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#elif BITRATE == 2400
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#define PHASE_THRESHOLD (PHASE_MAX / 2) // Target transition point of our phase window
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#endif
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#if BITRATE == 300
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#define DCD_TIMEOUT_SAMPLES 512
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#define DCD_MIN_COUNT 4
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#define DCD_TIMEOUT_SAMPLES 256
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#define DCD_MIN_COUNT 1
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#elif BITRATE == 1200
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#define DCD_TIMEOUT_SAMPLES CONFIG_ADC_SAMPLERATE/100
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#define DCD_MIN_COUNT CONFIG_ADC_SAMPLERATE/1600
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@ -139,7 +137,7 @@ inline static uint8_t sinSample(uint16_t i) {
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#define MARK_FREQ 2165
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#define SPACE_FREQ 3970
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#elif BITRATE == 300
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#define FILTER_CUTOFF 500
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#define FILTER_CUTOFF 155
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#define MARK_FREQ 1600
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#define SPACE_FREQ 1800
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#else
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@ -189,7 +187,7 @@ typedef struct Afsk
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#elif BITRATE == 2400
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int8_t delayBuf[7 + 1];
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#elif BITRATE == 300
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int8_t delayBuf[16 + 1];
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int8_t delayBuf[9 + 1];
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#endif
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FIFOBuffer rxFifo; // FIFO for received data
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