Reworked DAC ISR
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ee9b5ec307
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Modem/afsk.c
232
Modem/afsk.c
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@ -209,145 +209,111 @@ void afsk_adc_isr(Afsk *afsk, int8_t currentSample) {
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// Signal modulation and DAC //
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//////////////////////////////////////////////////////
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static void afsk_txStart(Afsk *af)
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{
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if (!af->sending)
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{
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af->phaseInc = MARK_INC;
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af->phaseAcc = 0;
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af->bitstuffCount = 0;
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af->sending = true;
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af->preambleLength = DIV_ROUND(CONFIG_AFSK_PREAMBLE_LEN * BITRATE, 8000);
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AFSK_DAC_IRQ_START(af->dacPin);
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}
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ATOMIC(af->tailLength = DIV_ROUND(CONFIG_AFSK_TRAILER_LEN * BITRATE, 8000));
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}
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#define BIT_STUFF_LEN 5
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#define SWITCH_TONE(inc) (((inc) == MARK_INC) ? SPACE_INC : MARK_INC)
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/**
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* DAC ISR callback.
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* This function has to be called by the DAC ISR when a sample of the configured
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* channel has been converted out.
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*/
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uint8_t afsk_dac_isr(Afsk *af)
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{
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AFSK_STROBE_ON();
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/* Check if we are at a start of a sample cycle */
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if (af->sampleIndex == 0)
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{
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if (af->txBit == 0)
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{
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/* We have just finished transimitting a char, get a new one. */
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if (fifo_isempty(&af->txFifo) && af->tailLength == 0)
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{
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AFSK_DAC_IRQ_STOP(af->dacPin);
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af->sending = false;
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AFSK_STROBE_OFF();
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return 0;
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static void afsk_txStart(Afsk *afsk) {
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if (!afsk->sending) {
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afsk->phaseInc = MARK_INC;
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afsk->phaseAcc = 0;
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afsk->bitstuffCount = 0;
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afsk->sending = true;
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afsk->preambleLength = DIV_ROUND(CONFIG_AFSK_PREAMBLE_LEN * BITRATE, 8000);
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AFSK_DAC_IRQ_START(afsk->dacPin);
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}
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else
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{
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/*
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* If we have just finished sending an unstuffed byte,
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* reset bitstuff counter.
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*/
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if (!af->bitStuff)
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af->bitstuffCount = 0;
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af->bitStuff = true;
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/*
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* Handle preamble and trailer
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*/
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if (af->preambleLength == 0)
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{
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if (fifo_isempty(&af->txFifo))
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{
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af->tailLength--;
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af->currentOutputByte = HDLC_FLAG;
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}
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else
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af->currentOutputByte = fifo_pop(&af->txFifo);
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}
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else
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{
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af->preambleLength--;
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af->currentOutputByte = HDLC_FLAG;
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}
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/* Handle char escape */
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if (af->currentOutputByte == AX25_ESC)
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{
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if (fifo_isempty(&af->txFifo))
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{
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AFSK_DAC_IRQ_STOP(af->dacPin);
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af->sending = false;
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AFSK_STROBE_OFF();
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return 0;
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}
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else
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af->currentOutputByte = fifo_pop(&af->txFifo);
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}
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else if (af->currentOutputByte == HDLC_FLAG || af->currentOutputByte == HDLC_RESET)
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/* If these chars are not escaped disable bit stuffing */
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af->bitStuff = false;
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}
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/* Start with LSB mask */
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af->txBit = 0x01;
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}
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/* check for bit stuffing */
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if (af->bitStuff && af->bitstuffCount >= BIT_STUFF_LEN)
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{
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/* If there are more than 5 ones in a row insert a 0 */
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af->bitstuffCount = 0;
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/* switch tone */
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af->phaseInc = SWITCH_TONE(af->phaseInc);
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}
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else
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{
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/*
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* NRZI: if we want to transmit a 1 the modulated frequency will stay
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* unchanged; with a 0, there will be a change in the tone.
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*/
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if (af->currentOutputByte & af->txBit)
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{
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/*
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* Transmit a 1:
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* - Stay on the previous tone
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* - Increase bit stuff counter
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*/
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af->bitstuffCount++;
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}
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else
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{
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/*
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* Transmit a 0:
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* - Reset bit stuff counter
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* - Switch tone
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*/
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af->bitstuffCount = 0;
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af->phaseInc = SWITCH_TONE(af->phaseInc);
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}
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/* Go to the next bit */
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af->txBit <<= 1;
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}
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af->sampleIndex = DAC_SAMPLESPERBIT;
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}
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/* Get new sample and put it out on the DAC */
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af->phaseAcc += af->phaseInc;
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af->phaseAcc %= SIN_LEN;
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af->sampleIndex--;
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AFSK_STROBE_OFF();
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return sinSample(af->phaseAcc);
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ATOMIC(afsk->tailLength = DIV_ROUND(CONFIG_AFSK_TRAILER_LEN * BITRATE, 8000));
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}
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// This is the DAC ISR, called at sampling ratewhenever the DAC IRQ is on.
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// It modulates the data to be transmitted and returns a value directly
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// for output on the DAC
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uint8_t afsk_dac_isr(Afsk *afsk) {
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// Check whether we are at the beginning of a sample
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if (afsk->sampleIndex == 0) {
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if (afsk->txBit == 0) {
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// If TX FIFO is empty and tail-length has decremented to 0
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// we are done, stop the IRQ and reset
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if (fifo_isempty(&afsk->txFifo) && afsk->tailLength == 0) {
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AFSK_DAC_IRQ_STOP(afsk->dacPin);
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afsk->sending = false;
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return 0;
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} else {
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// Reset the bitstuff counter if we have just sent
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// a bitstuffed byte
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if (!afsk->bitStuff) afsk->bitstuffCount = 0;
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// Reset bitstuff indicator to true
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afsk->bitStuff = true;
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// Check if we are in preamble or tail
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if (afsk->preambleLength == 0) {
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if (fifo_isempty(&afsk->txFifo)) {
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afsk->tailLength--;
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afsk->currentOutputByte = HDLC_FLAG;
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} else {
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// If preamble is already transmitted and TX
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// buffer is not empty, we should get a byte
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// for transmission
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afsk->currentOutputByte = fifo_pop(&afsk->txFifo);
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}
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} else {
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afsk->preambleLength--;
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afsk->currentOutputByte = HDLC_FLAG;
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}
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// Handle escape sequences
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if (afsk->currentOutputByte == AX25_ESC) {
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if (fifo_isempty(&afsk->txFifo)) {
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AFSK_DAC_IRQ_STOP(afsk->dacPin);
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afsk->sending = false;
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return 0;
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} else {
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afsk->currentOutputByte = fifo_pop(&afsk->txFifo);
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}
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} else if (afsk->currentOutputByte == HDLC_FLAG || afsk->currentOutputByte == HDLC_RESET) {
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afsk->bitStuff = false;
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}
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}
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// Start with LSB mask
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afsk->txBit = 0x01;
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}
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// Check for bit stuffing
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if (afsk->bitStuff && afsk->bitstuffCount >= BIT_STUFF_LEN) {
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afsk->bitstuffCount = 0;
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afsk->phaseInc = SWITCH_TONE(afsk->phaseInc);
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} else {
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// We are using NRZI so if we want to transmit a 1
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// the modulated signal will stay the same. For a 0
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// we make the signal transition
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if (afsk->currentOutputByte & afsk->txBit) {
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// We don't do anything, aka stay on the same
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// tone as before. We have sent one 1, so we
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// increment the bitstuff counter.
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afsk->bitstuffCount++;
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} else {
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// We switch the tone, and reset the bitstuff
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// counter, since we have now transmitted a
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// zero
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afsk->bitstuffCount = 0;
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afsk->phaseInc = SWITCH_TONE(afsk->phaseInc);
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}
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// Move on to the next bit
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afsk->txBit <<= 1;
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}
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afsk->sampleIndex = DAC_SAMPLESPERBIT;
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}
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// Retrieve af new sample index and DAC it
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afsk->phaseAcc += afsk->phaseInc;
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afsk->phaseAcc %= SIN_LEN;
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afsk->sampleIndex--;
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return sinSample(afsk->phaseAcc);
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}
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//////////////////////////////////////////////////////
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// File operation overwrites for read/write //
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//////////////////////////////////////////////////////
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@ -30,7 +30,7 @@ static void message_callback(struct AX25Msg *msg)
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kfile_printf(&ser.fd, "DATA: %.*s\r\n", msg->len, msg->info);
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}
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//////////////////////////////////////////////
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///////////////////////////////////////////////
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static void init(void)
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@ -1,2 +1,2 @@
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#define VERS_BUILD 108
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#define VERS_BUILD 113
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#define VERS_HOST "vixen"
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