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Migrated hardware

This commit is contained in:
Mark Qvist 2014-04-04 00:14:09 +02:00
parent 66ab74fca7
commit f045376369
2 changed files with 19 additions and 24 deletions
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41
Modem/hardware.c
View File

@ -8,33 +8,32 @@
#include <avr/interrupt.h> #include <avr/interrupt.h>
static Afsk *ctx; static Afsk *context;
void hw_afsk_adcInit(int ch, Afsk *_ctx) void hw_afsk_adcInit(int ch, Afsk *_context)
{ {
ctx = _ctx; context = _context;
ASSERT(ch <= 5); ASSERT(ch <= 5);
AFSK_STROBE_INIT(); // Timer/Counter Control Register 1 (Timer1 settings, for short)
AFSK_STROBE_OFF(); // Set prescaler to clk/8 (2 MHz), CTC, top = ICR1
/* Set prescaler to clk/8 (2 MHz), CTC, top = ICR1 */
TCCR1A = 0; TCCR1A = 0;
TCCR1B = BV(CS11) | BV(WGM13) | BV(WGM12); TCCR1B = BV(CS11) | BV(WGM13) | BV(WGM12);
/* Set max value to obtain a 9600Hz freq */ // Configure ICR1 to get 9.6KHz sampling rate
ICR1 = ((CPU_FREQ / 8) / 9600) - 1; ICR1 = ((CPU_FREQ / 8) / 9600) - 1; // Input capture register
/* Set reference to AVCC (5V), select CH */ // Set reference to AVCC (5V), select pin
ADMUX = BV(REFS0) | ch; ADMUX = BV(REFS0) | ch;
DDRC &= ~BV(ch); DDRC &= ~BV(ch);
PORTC &= ~BV(ch); PORTC &= ~BV(ch);
DIDR0 |= BV(ch); DIDR0 |= BV(ch);
/* Set autotrigger on Timer1 Input capture flag */ // Set autotrigger on Timer1 Input capture flag
ADCSRB = BV(ADTS2) | BV(ADTS1) | BV(ADTS0); ADCSRB = BV(ADTS2) | // Setting these three on (1-1-1) sets the ADC to
/* Enable ADC, autotrigger, 1MHz, IRQ enabled */ BV(ADTS1) | // "Timer1 capture event"
/* We are using the ADC a bit out of specifications otherwise it's not fast enough for our BV(ADTS0); //
* purposes */
ADCSRA = BV(ADEN) | // ADC Enable ADCSRA = BV(ADEN) | // ADC Enable
BV(ADSC) | // ADC Start converting BV(ADSC) | // ADC Start converting
BV(ADATE) | // Enable autotriggering BV(ADATE) | // Enable autotriggering
@ -43,17 +42,13 @@ void hw_afsk_adcInit(int ch, Afsk *_ctx)
} }
// Declare ADC ISR
bool hw_afsk_dac_isr; bool hw_afsk_dac_isr;
DECLARE_ISR(ADC_vect) {
/*
* This is how you declare an ISR.
*/
DECLARE_ISR(ADC_vect)
{
TIFR1 = BV(ICF1); TIFR1 = BV(ICF1);
afsk_adc_isr(ctx, ((int16_t)((ADC) >> 2) - 128)); afsk_adc_isr(context, ((int16_t)((ADC) >> 2) - 128));
if (hw_afsk_dac_isr) if (hw_afsk_dac_isr)
PORTD = afsk_dac_isr(ctx) & 0xF0; PORTD = afsk_dac_isr(context) & 0xF0;
else else
PORTD = 128; PORTD = 128;
} }

2
buildrev.h
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@ -1,2 +1,2 @@
#define VERS_BUILD 93 #define VERS_BUILD 96
#define VERS_HOST "vixen" #define VERS_HOST "vixen"