135 lines
3.8 KiB
C
135 lines
3.8 KiB
C
/**
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* \file
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* <!--
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* This file is part of BeRTOS.
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*
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* Bertos is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* As a special exception, you may use this file as part of a free software
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* library without restriction. Specifically, if other files instantiate
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* templates or use macros or inline functions from this file, or you compile
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* this file and link it with other files to produce an executable, this
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* file does not by itself cause the resulting executable to be covered by
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* the GNU General Public License. This exception does not however
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* invalidate any other reasons why the executable file might be covered by
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* the GNU General Public License.
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*
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* Copyright 2010 Develer S.r.l. (http://www.develer.com/)
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* Copyright 2010 Mohamed <mtarek16@gmail.com>
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*
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* -->
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*
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* \brief MSP430 debug support (implementation).
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*
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* \author Mohamed Tarek <mtarek16@gmail.com>
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*/
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#include "kdebug_msp430.h" /* for UART clock source definitions */
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#include "hw/hw_ser.h" /* bus macros overrides */
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#include "cfg/cfg_debug.h"
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#include <cfg/macros.h> /* for DIV_ROUND */
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#include <cpu/types.h>
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#include <cpu/attr.h>
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#include <io.h>
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#if CONFIG_KDEBUG_PORT == 0
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#ifndef KDBG_UART0_BUS_INIT
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#define KDBG_UART0_BUS_INIT do {} while (0)
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#endif
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#ifndef KDBG_UART0_BUS_RX
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#define KDBG_UART0_BUS_RX do {} while (0)
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#endif
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#ifndef KDBG_UART0_BUS_TX
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#define KDBG_UART0_BUS_TX do {} while (0)
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#endif
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/* USCI Register definitions */
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#define UCSTAT UCA0STAT
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#define UCTXBUF UCA0TXBUF
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#define UCRXBUF UCA0RXBUF
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#define UCTXIFG UCA0TXIFG
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#define UCRXIFG UCA0RXIFG
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#define UCTXIE UCA0TXIE
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#define UCRXIE UCA0RXIE
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#define UCCTL0 UCA0CTL0
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#define UCCTL1 UCA0CTL1
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#define UCBR0 UCA0BR0
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#define UCBR1 UCA0BR1
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#define UCMCTL UCA0MCTL
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#define IE IE2
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#define IFG IFG2
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#if CPU_MSP430F2274
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#define KDBG_MSP430_UART_PINS_INIT() do{ P3SEL = 0x30; }while(0)
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#endif
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#else
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#if CPU_MSP430F2274
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#error only 1 UART availbale, CONFIG_KDEBUG_PORT should be 0
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#endif
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#endif
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#define KDBG_WAIT_READY() do { while((UCSTAT & UCBUSY)); } while(0)
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#define KDBG_WAIT_TXDONE() do { while(!(IFG & UCTXIFG)); } while(0)
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#define KDBG_WRITE_CHAR(c) do { UCTXBUF = (c); } while(0)
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#define KDBG_MASK_IRQ(old) do { \
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(old) = IE; \
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IE &= ~(UCTXIE|UCRXIE);\
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} while(0)
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#define KDBG_RESTORE_IRQ(old) do { \
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KDBG_WAIT_TXDONE(); \
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IE = (old); \
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} while(0)
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#if CONFIG_KDEBUG_CLOCK_FREQ
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#define KDBG_MSP430_FREQ CONFIG_KDEBUG_CLOCK_FREQ
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#else
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#define KDBG_MSP430_FREQ CPU_FREQ
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#endif
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typedef uint8_t kdbg_irqsave_t;
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INLINE void kdbg_hw_init(void)
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{
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/* Compute the clock prescaler for the desired baudrate */
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uint16_t quot = DIV_ROUND(KDBG_MSP430_FREQ, CONFIG_KDEBUG_BAUDRATE);
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KDBG_MSP430_UART_PINS_INIT(); // Configure USCI TX/RX pins
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#if (CONFIG_KDEBUG_CLOCK_SOURCE == KDBG_UART_SMCLK)
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UCCTL1 |= UCSSEL_SMCLK;
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#else
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UCCTL1 |= UCSSEL_ACLK;
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#endif
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UCBR0 = quot & 0xFF; // Setup clock prescaler for the UART
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UCBR1 = quot >> 8;
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UCMCTL = UCBRS0; // No Modulation
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UCCTL0 = 0; // Default UART settings (8N1)
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UCCTL1 &= ~UCSWRST; // Initialize USCI state machine
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KDBG_MASK_IRQ(IE2); // Disable USCI interrupts
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}
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