137 lines
2.8 KiB
C
Executable File
137 lines
2.8 KiB
C
Executable File
#include "util/constants.h"
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#ifndef DEVICE_CONFIGURATION
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#define DEVICE_CONFIGURATION
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// CPU settings
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#define TARGET_CPU m1284p
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#define F_CPU 20000000UL
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#define FREQUENCY_CORRECTION 0
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// Voltage references
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// TODO: Determine best defaults
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#define CONFIG_ADC_REF 255
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#define CONFIG_DAC_REF 128
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// TODO: Change this back to default
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#define CONFIG_LED_INTENSITY 35
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//#define CONFIG_LED_INTENSITY 192
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#define CONFIG_COM_LED_TIMEOUT_MS 40
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#define CONFIG_LED_UPDATE_INTERVAL_MS 40
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// Demodulator settings
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#define OPEN_SQUELCH true
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// Serial settings
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#define SERIAL_DEBUG false
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#define TX_MAXWAIT 2UL
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#define CONFIG_QUEUE_SIZE 6000 // TODO: Optimise this by saving ram other places, add SD queue
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#define CONFIG_QUEUE_MAX_LENGTH 15
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#define CONFIG_UART0_BUFFER_SIZE 1536 // TODO: Tune this, what is actually required?
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#define CONFIG_UART1_BUFFER_SIZE 128
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#define CONFIG_SERIAL_TIMEOUT_MS 10
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#define CONFIG_BENCHMARK_MODE false
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// CSMA Settings
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#define CONFIG_FULL_DUPLEX false // TODO: Actually implement fdx
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#define CONFIG_CSMA_P 255
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#define AX25_MIN_FRAME_LEN 1
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#define AX25_MAX_FRAME_LEN 611
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// TODO: increase back to 576
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#define AX25_MAX_PAYLOAD 576
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// Packet settings
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#define CONFIG_PASSALL false
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// Port settings
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#if TARGET_CPU == m1284p
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#define ADC_PORT PORTA
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#define ADC_DDR DDRA
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#define DAC_PORT PORTC
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#define DAC_DDR DDRC
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#define VREF_PORT PORTD
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#define VREF_DDR DDRD
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#define LED_PORT PORTB
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#define LED_DDR DDRB
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#define PTT_DDR DDRD
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#define PTT_PORT PORTD
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#define PTT_PIN 5
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#define PTT_NEG_PIN 4
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#define SPI_PORT PORTB
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#define SPI_DDR DDRB
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#define SPI_MOSI 5
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#define SPI_MISO 6
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#define SPI_CLK 7
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#define SD_CS_DDR DDRA
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#define SD_CS_PORT PORTA
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#define SD_CS_PIN 6
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#define SD_DETECT_DDR DDRA
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#define SD_DETECT_PORT PORTA
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#define SD_DETECT_INPUT PINA
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#define SD_DETECT_PIN 7
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#define BT_DDR DDRA
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#define BT_PORT PORTA
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#define BT_INPUT PINA
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#define BT_MODE 3
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#define BT_RTS 4
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#define GPS_DDR DDRA
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#define GPS_PORT PORTA
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#define GPS_INPUT PINA
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#define GPS_EN_PIN 5
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#define USR_IO_DDR DDRA
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#define USR_IO_PORT PORTA
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#define USR_IO_1 1
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#define USR_IO_2 2
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#define USR_IO_3 3
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#define USR_IO_4 4
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#endif
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#endif
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/*
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PA0 ANALOG_IN
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PA1 USR_1
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PA2 USR_2
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PA3 USR_3 / BT_MODE // TODO: Set as output
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PA4 USR_4 / BT_RTS // TODO: Set as input
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PA5 GPS_EN // TODO: Set as output/input
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PA6 SD_CS // TODO: Set as output
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PA7 SD_DETECT // TODO: Set as input and enable pullup
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PB0 LED_RX
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PB1 LED_TX
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PB2 LED_STATUS
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PB3 LED_DRAIN_PWM
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PB4 LED_COM / SPI_SS (PGM)
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PB5 SPI_MOSI SD/PGM
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PB6 SPI_MISO SD/PGM
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PB7 SPI_CLK SD/PGM
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PC0 DAC_0
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PC1 DAC_1
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PC2 DAC_2
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PC3 DAC_3
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PC4 DAC_4
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PC5 DAC_5
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PC6 DAC_6
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PC7 DAC_7
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PD0 UART0_RX
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PD1 UART0_TX
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PD2 UART1_RX GPS
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PD3 UART1_TX GPS
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PD4 PTT_NEG
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PD5 PTT_SIG
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PD6 REF_DAC
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PD7 REF_ADC
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*/ |