115 lines
3.5 KiB
C
115 lines
3.5 KiB
C
/**
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* \file
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* <!--
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* This file is part of BeRTOS.
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*
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* Bertos is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* As a special exception, you may use this file as part of a free software
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* library without restriction. Specifically, if other files instantiate
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* templates or use macros or inline functions from this file, or you compile
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* this file and link it with other files to produce an executable, this
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* file does not by itself cause the resulting executable to be covered by
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* the GNU General Public License. This exception does not however
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* invalidate any other reasons why the executable file might be covered by
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* the GNU General Public License.
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*
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* Copyright 2008 Develer S.r.l. (http://www.develer.com/)
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* All Rights Reserved.
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* -->
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*
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* \brief Hardware macro definition.
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*
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*
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* \author Daniele Basile <asterix@develer.com>
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*/
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#ifndef HW_SPI_H
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#define HW_SPI_H
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#warning TODO:This is an example implentation, you must implement it!
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#include <cfg/macros.h>
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/**
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* SPI pin definition.
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*
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* \note CS is assert when level
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* is low.
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*
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* \{
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*/
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#define CS /* pin */ ///Connect to CS pin of Flash memory.
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#define SCK /* pin */ ///Connect to SCK pin of Flash memory.
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#define MOSI /* pin */ ///Connect to SI pin of Flash memory.
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#define MISO /* pin */ ///Connect to SO pin of Flash memory.
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#define SPI_PORT /* pin */ ///Micro pin PORT register.
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#define SPI_PIN /* pin */ ///Micro pin PIN register.
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#define SPI_DDR /* pin */ ///Micro pin DDR register.
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/*\}*/
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/**
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* Pin logic level.
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*
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* \{
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*/
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#define MOSI_LOW() do { /* Implement me! */ } while(0)
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#define MOSI_HIGH() do { /* Implement me! */ } while(0)
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#define MISO_HIGH() do { /* Implement me! */ } while(0)
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#define SCK_LOW() do { /* Implement me! */ } while(0)
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#define SCK_HIGH() do { /* Implement me! */ } while(0)
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#define CS_LOW() do { /* Implement me! */ } while(0)
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#define CS_HIGH() do { /* Implement me! */ } while(0)
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/*\}*/
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/**
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* SPI pin commands.
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*
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* \{
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*/
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#define CS_ENABLE() CS_LOW()
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#define CS_DISABLE() CS_HIGH()
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#define SS_ACTIVE() CS_LOW()
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#define SS_INACTIVE() CS_HIGH()
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#define SCK_INACTIVE() SCK_LOW()
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#define SCK_ACTIVE() SCK_HIGH()
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#define CS_OUT() do { /* Implement me! */ } while(0)
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#define MOSI_IN() do { /* Implement me! */ } while(0)
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#define MOSI_OUT() do { /* Implement me! */ } while(0)
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#define IS_MISO_HIGH() (false /* Implement me! */ )
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#define MISO_IN() do { /* Implement me! */ } while(0)
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#define MISO_OUT() do { /* Implement me! */ } while(0)
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#define SCK_OUT() do { /* Implement me! */ } while(0)
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#define SCK_PULSE()\
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do {\
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SCK_HIGH();\
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SCK_LOW();\
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} while (0)
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/*\}*/
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#define SPI_HW_INIT() \
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CS_DISABLE();\
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MOSI_LOW();\
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SCK_LOW();\
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MISO_IN();\
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MOSI_OUT();\
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SCK_OUT();\
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CS_OUT();
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#endif /* HW_SPI_H */
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