228 lines
7.9 KiB
C
Executable File
228 lines
7.9 KiB
C
Executable File
#ifndef AFSK_H
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#define AFSK_H
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#include "device.h"
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <avr/pgmspace.h>
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#include "util/FIFO.h"
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#include "protocol/HDLC.h"
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// TODO: Optimise RAM by moving this to progmem
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#define SIN_LEN 512
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static const uint8_t sine_table[] =
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{
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128, 129, 131, 132, 134, 135, 137, 138, 140, 142, 143, 145, 146, 148, 149, 151,
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152, 154, 155, 157, 158, 160, 162, 163, 165, 166, 167, 169, 170, 172, 173, 175,
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176, 178, 179, 181, 182, 183, 185, 186, 188, 189, 190, 192, 193, 194, 196, 197,
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198, 200, 201, 202, 203, 205, 206, 207, 208, 210, 211, 212, 213, 214, 215, 217,
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218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 233,
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234, 234, 235, 236, 237, 238, 238, 239, 240, 241, 241, 242, 243, 243, 244, 245,
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245, 246, 246, 247, 248, 248, 249, 249, 250, 250, 250, 251, 251, 252, 252, 252,
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253, 253, 253, 253, 254, 254, 254, 254, 254, 255, 255, 255, 255, 255, 255, 255,
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};
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inline static uint8_t sinSample(uint16_t i) {
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uint16_t newI = i % (SIN_LEN/2);
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newI = (newI >= (SIN_LEN/4)) ? (SIN_LEN/2 - newI -1) : newI;
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uint8_t sine = sine_table[newI];
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return (i >= (SIN_LEN/2)) ? (255 - sine) : sine;
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}
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#define SWITCH_TONE(inc) (((inc) == MARK_INC) ? SPACE_INC : MARK_INC)
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#define BITS_DIFFER(bits1, bits2) (((bits1)^(bits2)) & 0x01)
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#define TRANSITION_FOUND(bits) BITS_DIFFER((bits), (bits) >> 1)
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#define DUAL_XOR(bits1, bits2) ((((bits1)^(bits2)) & 0x03) == 0x03)
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#define QUAD_XOR(bits1, bits2) ((((bits1)^(bits2)) & 0x0F) == 0x0F)
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#define CPU_FREQ F_CPU
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#define BITRATE 1200
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#if BITRATE == 300
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#define CONFIG_ADC_SAMPLERATE 4800UL
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#define CONFIG_DAC_SAMPLERATE 19200UL
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#define CLOCK_TICKS_PER_10_MS 96
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#elif BITRATE == 1200
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#define CONFIG_ADC_SAMPLERATE 9600UL
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#define CONFIG_DAC_SAMPLERATE 19200UL
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#define CLOCK_TICKS_PER_10_MS 96
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#elif BITRATE == 2400
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#define CONFIG_ADC_SAMPLERATE 19200UL
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#define CONFIG_DAC_SAMPLERATE 19200UL
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#define CLOCK_TICKS_PER_10_MS 192
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#endif
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#define CLOCK_TICKS_PER_SEC CONFIG_ADC_SAMPLERATE
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#define CONFIG_AFSK_RX_BUFLEN AX25_MAX_FRAME_LEN
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#define CONFIG_AFSK_TX_BUFLEN AX25_MAX_FRAME_LEN
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#define CONFIG_AFSK_RXTIMEOUT 0
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#if BITRATE == 300
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#define CONFIG_AFSK_PREAMBLE_LEN 150UL
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#define CONFIG_AFSK_TRAILER_LEN 10UL
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#elif BITRATE == 1200
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#define CONFIG_AFSK_PREAMBLE_LEN 150UL
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#define CONFIG_AFSK_TRAILER_LEN 10UL
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#elif BITRATE == 2400
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#define CONFIG_AFSK_PREAMBLE_LEN 230UL
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#define CONFIG_AFSK_TRAILER_LEN 25UL
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#endif
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#define BIT_STUFF_LEN 5
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#define ADC_SAMPLESPERBIT (CONFIG_ADC_SAMPLERATE / BITRATE)
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#define ADC_TICKS_BETWEEN_SAMPLES ((((CPU_FREQ+FREQUENCY_CORRECTION)) / CONFIG_ADC_SAMPLERATE) - 1)
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#define DAC_SAMPLESPERBIT (CONFIG_DAC_SAMPLERATE / BITRATE)
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#define DAC_TICKS_BETWEEN_SAMPLES ((((CPU_FREQ+FREQUENCY_CORRECTION)) / CONFIG_DAC_SAMPLERATE) - 1)
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#if BITRATE == 300
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#define SIGNAL_TRANSITIONED(bits) DUAL_XOR((bits), (bits) >> 2)
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#elif BITRATE == 1200
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#if CONFIG_ADC_SAMPLERATE == 19200
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#define SIGNAL_TRANSITIONED(bits) QUAD_XOR((bits), (bits) >> 4)
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#elif CONFIG_ADC_SAMPLERATE == 9600
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#define SIGNAL_TRANSITIONED(bits) DUAL_XOR((bits), (bits) >> 2)
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#endif
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#elif BITRATE == 2400
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#define SIGNAL_TRANSITIONED(bits) DUAL_XOR((bits), (bits) >> 2)
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#endif
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#if BITRATE == 300
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#define PHASE_BITS 1
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#else
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#define PHASE_BITS 8 // Sub-sample phase counter resolution
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#endif
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#define PHASE_INC 1 // Nudge by above resolution for each adjustment
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#define PHASE_MAX (ADC_SAMPLESPERBIT * PHASE_BITS) // Size of our phase counter
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// TODO: Test which target is best in real world
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// For 1200, this seems a little better
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#if BITRATE == 300
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#define PHASE_THRESHOLD (PHASE_MAX / 2)
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#elif BITRATE == 1200
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#if CONFIG_ADC_SAMPLERATE == 19200
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#define PHASE_THRESHOLD (PHASE_MAX / 2)+3*PHASE_BITS // Target transition point of our phase window
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#elif CONFIG_ADC_SAMPLERATE == 9600
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#define PHASE_THRESHOLD (PHASE_MAX / 2) // Target transition point of our phase window
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#endif
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#elif BITRATE == 2400
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#define PHASE_THRESHOLD (PHASE_MAX / 2) // Target transition point of our phase window
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#endif
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#if BITRATE == 300
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#define DCD_TIMEOUT_SAMPLES 256
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#define DCD_MIN_COUNT 1
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#elif BITRATE == 1200
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#define DCD_TIMEOUT_SAMPLES CONFIG_ADC_SAMPLERATE/100
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#define DCD_MIN_COUNT CONFIG_ADC_SAMPLERATE/1600
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#elif BITRATE == 2400
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#define DCD_TIMEOUT_SAMPLES CONFIG_ADC_SAMPLERATE/100
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#define DCD_MIN_COUNT CONFIG_ADC_SAMPLERATE/1600
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#endif
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#if BITRATE == 1200
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#define FILTER_CUTOFF 500
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#define MARK_FREQ 1200
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#define SPACE_FREQ 2200
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#elif BITRATE == 2400
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#define FILTER_CUTOFF 1000
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#define MARK_FREQ 2165
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#define SPACE_FREQ 3970
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#elif BITRATE == 300
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#define FILTER_CUTOFF 155
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#define MARK_FREQ 1600
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#define SPACE_FREQ 1800
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#else
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#error Unsupported bitrate!
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#endif
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typedef struct Hdlc
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{
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uint8_t demodulatedBits;
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uint8_t bitIndex;
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uint8_t currentByte;
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bool receiving;
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bool dcd;
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uint8_t dcd_count;
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} Hdlc;
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typedef struct Afsk
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{
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// Stream access to modem
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FILE fd;
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// General values
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Hdlc hdlc; // We need a link control structure
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uint16_t preambleLength; // Length of sync preamble
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uint16_t tailLength; // Length of transmission tail
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// Modulation values
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uint8_t sampleIndex; // Current sample index for outgoing bit
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uint8_t currentOutputByte; // Current byte to be modulated
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uint8_t txBit; // Mask of current modulated bit
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bool bitStuff; // Whether bitstuffing is allowed
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uint8_t bitstuffCount; // Counter for bit-stuffing
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uint16_t phaseAcc; // Phase accumulator
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uint16_t phaseInc; // Phase increment per sample
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uint16_t silentSamples; // How many samples were silent
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volatile bool sending; // Set when modem is sending
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volatile bool sending_data; // Set when modem is sending data
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// Demodulation values
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FIFOBuffer delayFifo; // Delayed FIFO for frequency discrimination
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#if BITRATE == 1200
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int8_t delayBuf[ADC_SAMPLESPERBIT / 2 + 1]; // Actual data storage for said FIFO
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#elif BITRATE == 2400
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int8_t delayBuf[7 + 1];
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#elif BITRATE == 300
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int8_t delayBuf[9 + 1];
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#endif
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FIFOBuffer rxFifo; // FIFO for received data
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uint8_t rxBuf[CONFIG_AFSK_RX_BUFLEN]; // Actual data storage for said FIFO
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FIFOBuffer txFifo; // FIFO for transmit data
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uint8_t txBuf[CONFIG_AFSK_TX_BUFLEN]; // Actual data storage for said FIFO
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int16_t iirX[2]; // IIR Filter X cells
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int16_t iirY[2]; // IIR Filter Y cells
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#if ADC_SAMPLESPERBIT < 17
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uint16_t sampledBits; // Bits sampled by the demodulator (at ADC speed)
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#elif ADC_SAMPLESPERBIT < 33
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uint32_t sampledBits;
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#else
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#error Not enough space in sampledBits variable!
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#endif
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int16_t currentPhase; // Current phase of the demodulator
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uint8_t actualBits; // Actual found bits at correct bitrate
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volatile int status; // Status of the modem, 0 means OK
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} Afsk;
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#define DIV_ROUND(dividend, divisor) (((dividend) + (divisor) / 2) / (divisor))
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#define MARK_INC (uint16_t)(DIV_ROUND(SIN_LEN * (uint32_t)MARK_FREQ, CONFIG_DAC_SAMPLERATE))
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#define SPACE_INC (uint16_t)(DIV_ROUND(SIN_LEN * (uint32_t)SPACE_FREQ, CONFIG_DAC_SAMPLERATE))
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#define AFSK_DAC_IRQ_START() do { extern bool hw_afsk_dac_isr; hw_afsk_dac_isr = true; } while (0)
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#define AFSK_DAC_IRQ_STOP() do { extern bool hw_afsk_dac_isr; hw_afsk_dac_isr = false; } while (0)
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void AFSK_init(Afsk *afsk);
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void AFSK_adc_init(void);
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void AFSK_dac_init(void);
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void AFSK_poll(Afsk *afsk);
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#endif |