mirror of https://github.com/aredn/aredn.git
93 lines
1.8 KiB
Diff
93 lines
1.8 KiB
Diff
--- a/target/linux/ath79/image/generic-ubnt.mk
|
|
+++ b/target/linux/ath79/image/generic-ubnt.mk
|
|
@@ -157,6 +157,22 @@
|
|
endef
|
|
TARGET_DEVICES += ubnt_powerbeam-m5-xw
|
|
|
|
+define Device/ubnt_rocket-m5-xw
|
|
+ $(Device/ubnt-xw)
|
|
+ DEVICE_MODEL := Rocket M XW
|
|
+ DEVICE_PACKAGES += rssileds
|
|
+ SUPPORTED_DEVICES += rocket-m-xw rocket-m5-xw loco-m-xw
|
|
+endef
|
|
+TARGET_DEVICES += ubnt_rocket-m5-xw
|
|
+
|
|
+define Device/ubnt_rocket-m2-xw
|
|
+ $(Device/ubnt-xw)
|
|
+ DEVICE_MODEL := Rocket M2 XW
|
|
+ DEVICE_PACKAGES += rssileds
|
|
+ SUPPORTED_DEVICES += rocket-m-xw rocket-m2-xw loco-m-xw
|
|
+endef
|
|
+TARGET_DEVICES += ubnt_rocket-m2-xw
|
|
+
|
|
define Device/ubnt_rocket-5ac-lite
|
|
$(Device/ubnt-xc)
|
|
SOC := qca9558
|
|
|
|
--- /dev/null
|
|
+++ b/target/linux/ath79/dts/ar9342_ubnt_rocket-m5-xw.dts
|
|
@@ -0,0 +1,34 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
+
|
|
+#include "ar9342_ubnt_xw.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "ubnt,rocket-m5-xw", "ubnt,xw", "qca,ar9342";
|
|
+ model = "Ubiquiti Rocket M5 (XW)";
|
|
+};
|
|
+
|
|
+&mdio0 {
|
|
+ status = "okay";
|
|
+
|
|
+ phy-mask = <4>;
|
|
+
|
|
+ phy4: ethernet-phy@4 {
|
|
+ reg = <4>;
|
|
+ };
|
|
+};
|
|
+
|
|
+ð0 {
|
|
+ status = "okay";
|
|
+
|
|
+ /* default for ar934x, except for 1000M and 10M */
|
|
+ pll-data = <0x02000000 0x00000101 0x00001313>;
|
|
+
|
|
+ phy-mode = "rgmii-id";
|
|
+ phy-handle = <&phy4>;
|
|
+
|
|
+ gmac-config {
|
|
+ device = <&gmac>;
|
|
+ rxd-delay = <3>;
|
|
+ rxdv-delay = <3>;
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/target/linux/ath79/dts/ar9342_ubnt_rocket-m2-xw.dts
|
|
@@ -0,0 +1,26 @@
|
|
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
+
|
|
+#include "ar9342_ubnt_xw.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "ubnt,rocket-m2-xw", "ubnt,xw", "qca,ar9342";
|
|
+ model = "Ubiquiti Rocket M2 (XW)";
|
|
+};
|
|
+
|
|
+&mdio0 {
|
|
+ status = "okay";
|
|
+
|
|
+ phy-mask = <0x1>;
|
|
+
|
|
+ phy1: ethernet-phy@1 {
|
|
+ reg = <1>;
|
|
+ phy-mode = "mii";
|
|
+ reset-gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+ð0 {
|
|
+ status = "okay";
|
|
+
|
|
+ phy-handle = <&phy1>;
|
|
+};
|