/* * Copyright (C) 2024 Roberto Lopez Castro (roberto.lopez.castro@udc.es). All * Rights Reserved. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. */ #pragma once namespace marlin_24 { constexpr int ceildiv(int a, int b) { return (a + b - 1) / b; } // Instances of `Vec` are used to organize groups of >>registers<<, as needed // for instance as inputs to tensor core operations. Consequently, all // corresponding index accesses must be compile-time constants, which is why we // extensively use `#pragma unroll` throughout the kernel code to guarantee // this. template struct Vec { T elems[n]; __device__ T& operator[](int i) { return elems[i]; } }; template struct ShapeBase { static constexpr int M = M_, N = N_, K = K_; }; using I4 = Vec; // Matrix fragments for tensor core instructions; their precise layout is // documented here: // https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#matrix-fragments-for-mma-m16n8k16-with-floating-point-type using FragA = Vec; using FragB = Vec; using FragM = Vec; using FragC = Vec; using FragS = Vec; // quantization scales } // namespace marlin_24