Add ARMv8-A AES support
More than twice as fast as plain C code. Note that both ARMv7 and ARMv8 can be further improved with better use of NEON. Also tweak ARMv7 multiplier
This commit is contained in:
Howard Chu
parent
7c899ec33a
commit
69b59186f3
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@ -37,6 +37,13 @@
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#include "hash-ops.h"
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#include "oaes_lib.h"
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#define MEMORY (1 << 21) // 2MB scratchpad
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#define ITER (1 << 20)
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#define AES_BLOCK_SIZE 16
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#define AES_KEY_SIZE 32
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#define INIT_SIZE_BLK 8
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#define INIT_SIZE_BYTE (INIT_SIZE_BLK * AES_BLOCK_SIZE)
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#if defined(__x86_64__) || (defined(_MSC_VER) && defined(_WIN64))
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// Optimised code below, uses x86-specific intrinsics, SSE2, AES-NI
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// Fall back to more portable code is down at the bottom
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@ -77,12 +84,6 @@
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#define ASM __asm
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#endif
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#define MEMORY (1 << 21) // 2MB scratchpad
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#define ITER (1 << 20)
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#define AES_BLOCK_SIZE 16
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#define AES_KEY_SIZE 32
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#define INIT_SIZE_BLK 8
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#define INIT_SIZE_BYTE (INIT_SIZE_BLK * AES_BLOCK_SIZE)
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#define TOTALBLOCKS (MEMORY / AES_BLOCK_SIZE)
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#define U64(x) ((uint64_t *) (x))
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@ -643,9 +644,7 @@ void cn_slow_hash(const void *data, size_t length, char *hash)
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extra_hashes[state.hs.b[0] & 3](&state, 200, hash);
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}
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#elif defined(__arm__)
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// ND: Some minor optimizations for ARM7 (raspberrry pi 2), effect seems to be ~40-50% faster.
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// Needs more work.
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#elif defined(__arm__) || defined(__aarch64__)
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void slow_hash_allocate_state(void)
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{
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// Do nothing, this is just to maintain compatibility with the upgraded slow-hash.c
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@ -658,13 +657,6 @@ void slow_hash_free_state(void)
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return;
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}
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#define MEMORY (1 << 21) /* 2 MiB */
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#define ITER (1 << 20)
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#define AES_BLOCK_SIZE 16
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#define AES_KEY_SIZE 32 /*16*/
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#define INIT_SIZE_BLK 8
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#define INIT_SIZE_BYTE (INIT_SIZE_BLK * AES_BLOCK_SIZE)
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#if defined(__GNUC__)
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#define RDATA_ALIGN16 __attribute__ ((aligned(16)))
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#define STATIC static
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@ -677,6 +669,276 @@ void slow_hash_free_state(void)
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#define U64(x) ((uint64_t *) (x))
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#pragma pack(push, 1)
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union cn_slow_hash_state
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{
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union hash_state hs;
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struct
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{
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uint8_t k[64];
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uint8_t init[INIT_SIZE_BYTE];
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};
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};
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#pragma pack(pop)
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#if defined(__aarch64__) && defined(__ARM_FEATURE_CRYPTO)
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/* ARMv8-A optimized with NEON and AES instructions.
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* Copied from the x86-64 AES-NI implementation. It has much the same
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* characteristics as x86-64: there's no 64x64=128 multiplier for vectors,
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* and moving between vector and regular registers stalls the pipeline.
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*/
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#include <arm_neon.h>
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#define TOTALBLOCKS (MEMORY / AES_BLOCK_SIZE)
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#define state_index(x) (((*((uint64_t *)x) >> 4) & (TOTALBLOCKS - 1)) << 4)
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#define __mul() __asm__("mul %0, %1, %2\n\t" : "=r"(lo) : "r"(c[0]), "r"(b[0]) ); \
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__asm__("umulh %0, %1, %2\n\t" : "=r"(hi) : "r"(c[0]), "r"(b[0]) );
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#define pre_aes() \
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j = state_index(a); \
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_c = vld1q_u8(&hp_state[j]); \
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_a = vld1q_u8((const uint8_t *)a); \
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#define post_aes() \
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vst1q_u8((uint8_t *)c, _c); \
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_b = veorq_u8(_b, _c); \
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vst1q_u8(&hp_state[j], _b); \
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j = state_index(c); \
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p = U64(&hp_state[j]); \
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b[0] = p[0]; b[1] = p[1]; \
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__mul(); \
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a[0] += hi; a[1] += lo; \
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p = U64(&hp_state[j]); \
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p[0] = a[0]; p[1] = a[1]; \
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a[0] ^= b[0]; a[1] ^= b[1]; \
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_b = _c; \
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/* Note: this was based on a standard 256bit key schedule but
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* it's been shortened since Cryptonight doesn't use the full
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* key schedule. Don't try to use this for vanilla AES.
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*/
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static void aes_expand_key(const uint8_t *key, uint8_t *expandedKey) {
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__asm__("mov x2, %1\n\t" : : "r"(key), "r"(expandedKey));
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__asm__(
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" adr x3,Lrcon\n"
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"\n"
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" eor v0.16b,v0.16b,v0.16b\n"
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" ld1 {v3.16b},[x0],#16\n"
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" ld1 {v1.4s,v2.4s},[x3],#32\n"
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" b L256\n"
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".align 5\n"
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"Lrcon:\n"
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".long 0x01,0x01,0x01,0x01\n"
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".long 0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d,0x0c0f0e0d // rotate-n-splat\n"
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".long 0x1b,0x1b,0x1b,0x1b\n"
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"\n"
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".align 4\n"
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"L256:\n"
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" ld1 {v4.16b},[x0]\n"
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" mov w1,#5\n"
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" st1 {v3.4s},[x2],#16\n"
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"\n"
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"Loop256:\n"
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" tbl v6.16b,{v4.16b},v2.16b\n"
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" ext v5.16b,v0.16b,v3.16b,#12\n"
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" st1 {v4.4s},[x2],#16\n"
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" aese v6.16b,v0.16b\n"
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" subs w1,w1,#1\n"
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"\n"
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" eor v3.16b,v3.16b,v5.16b\n"
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" ext v5.16b,v0.16b,v5.16b,#12\n"
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" eor v3.16b,v3.16b,v5.16b\n"
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" ext v5.16b,v0.16b,v5.16b,#12\n"
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" eor v6.16b,v6.16b,v1.16b\n"
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" eor v3.16b,v3.16b,v5.16b\n"
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" shl v1.16b,v1.16b,#1\n"
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" eor v3.16b,v3.16b,v6.16b\n"
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" st1 {v3.4s},[x2],#16\n"
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" b.eq Ldone\n"
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"\n"
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" dup v6.4s,v3.s[3] // just splat\n"
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" ext v5.16b,v0.16b,v4.16b,#12\n"
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" aese v6.16b,v0.16b\n"
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"\n"
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" eor v4.16b,v4.16b,v5.16b\n"
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" ext v5.16b,v0.16b,v5.16b,#12\n"
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" eor v4.16b,v4.16b,v5.16b\n"
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" ext v5.16b,v0.16b,v5.16b,#12\n"
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" eor v4.16b,v4.16b,v5.16b\n"
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"\n"
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" eor v4.16b,v4.16b,v6.16b\n"
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" b Loop256\n"
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"\n"
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"Ldone:\n");
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}
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/* An ordinary AES round is a sequence of SubBytes, ShiftRows, MixColumns, AddRoundKey. There
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* is also an InitialRound which consists solely of AddRoundKey. The ARM instructions slice
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* this sequence differently; the aese instruction performs AddRoundKey, SubBytes, ShiftRows.
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* The aesmc instruction does the MixColumns. Since the aese instruction moves the AddRoundKey
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* up front, and Cryptonight's hash skips the InitialRound step, we have to kludge it here by
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* feeding in a vector of zeros for our first step. Also we have to do our own Xor explicitly
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* at the last step, to provide the AddRoundKey that the ARM instructions omit.
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*/
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STATIC INLINE void aes_pseudo_round(const uint8_t *in, uint8_t *out, const uint8_t *expandedKey, int nblocks)
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{
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const uint8x16_t *k = (const uint8x16_t *)expandedKey, zero = {0};
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uint8x16_t tmp;
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int i;
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for (i=0; i<nblocks; i++)
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{
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uint8x16_t tmp = vld1q_u8(in + i * AES_BLOCK_SIZE);
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tmp = vaeseq_u8(tmp, zero);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[0]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[1]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[2]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[3]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[4]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[5]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[6]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[7]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[8]);
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tmp = vaesmcq_u8(tmp);
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tmp = veorq_u8(tmp, k[9]);
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vst1q_u8(out + i * AES_BLOCK_SIZE, tmp);
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}
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}
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STATIC INLINE void aes_pseudo_round_xor(const uint8_t *in, uint8_t *out, const uint8_t *expandedKey, const uint8_t *xor, int nblocks)
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{
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const uint8x16_t *k = (const uint8x16_t *)expandedKey;
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const uint8x16_t *x = (const uint8x16_t *)xor;
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uint8x16_t tmp;
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int i;
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for (i=0; i<nblocks; i++)
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{
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uint8x16_t tmp = vld1q_u8(in + i * AES_BLOCK_SIZE);
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tmp = vaeseq_u8(tmp, x[i]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[0]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[1]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[2]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[3]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[4]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[5]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[6]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[7]);
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tmp = vaesmcq_u8(tmp);
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tmp = vaeseq_u8(tmp, k[8]);
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tmp = vaesmcq_u8(tmp);
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tmp = veorq_u8(tmp, k[9]);
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vst1q_u8(out + i * AES_BLOCK_SIZE, tmp);
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}
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}
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void cn_slow_hash(const void *data, size_t length, char *hash)
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{
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RDATA_ALIGN16 uint8_t expandedKey[240];
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RDATA_ALIGN16 uint8_t hp_state[MEMORY];
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uint8_t text[INIT_SIZE_BYTE];
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RDATA_ALIGN16 uint64_t a[2];
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RDATA_ALIGN16 uint64_t b[2];
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RDATA_ALIGN16 uint64_t c[2];
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union cn_slow_hash_state state;
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uint8x16_t _a, _b, _c, zero = {0};
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uint64_t hi, lo;
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size_t i, j;
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uint64_t *p = NULL;
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static void (*const extra_hashes[4])(const void *, size_t, char *) =
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{
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hash_extra_blake, hash_extra_groestl, hash_extra_jh, hash_extra_skein
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};
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/* CryptoNight Step 1: Use Keccak1600 to initialize the 'state' (and 'text') buffers from the data. */
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hash_process(&state.hs, data, length);
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memcpy(text, state.init, INIT_SIZE_BYTE);
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/* CryptoNight Step 2: Iteratively encrypt the results from Keccak to fill
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* the 2MB large random access buffer.
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*/
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aes_expand_key(state.hs.b, expandedKey);
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for(i = 0; i < MEMORY / INIT_SIZE_BYTE; i++)
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{
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aes_pseudo_round(text, text, expandedKey, INIT_SIZE_BLK);
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memcpy(&hp_state[i * INIT_SIZE_BYTE], text, INIT_SIZE_BYTE);
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}
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U64(a)[0] = U64(&state.k[0])[0] ^ U64(&state.k[32])[0];
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U64(a)[1] = U64(&state.k[0])[1] ^ U64(&state.k[32])[1];
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U64(b)[0] = U64(&state.k[16])[0] ^ U64(&state.k[48])[0];
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U64(b)[1] = U64(&state.k[16])[1] ^ U64(&state.k[48])[1];
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/* CryptoNight Step 3: Bounce randomly 1 million times through the mixing buffer,
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* using 500,000 iterations of the following mixing function. Each execution
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* performs two reads and writes from the mixing buffer.
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*/
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_b = vld1q_u8((const uint8_t *)b);
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for(i = 0; i < ITER / 2; i++)
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{
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pre_aes();
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_c = vaeseq_u8(_c, zero);
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_c = vaesmcq_u8(_c);
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_c = veorq_u8(_c, _a);
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post_aes();
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}
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/* CryptoNight Step 4: Sequentially pass through the mixing buffer and use 10 rounds
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* of AES encryption to mix the random data back into the 'text' buffer. 'text'
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* was originally created with the output of Keccak1600. */
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memcpy(text, state.init, INIT_SIZE_BYTE);
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aes_expand_key(&state.hs.b[32], expandedKey);
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for(i = 0; i < MEMORY / INIT_SIZE_BYTE; i++)
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{
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// add the xor to the pseudo round
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aes_pseudo_round_xor(text, text, expandedKey, &hp_state[i * INIT_SIZE_BYTE], INIT_SIZE_BLK);
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}
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/* CryptoNight Step 5: Apply Keccak to the state again, and then
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* use the resulting data to select which of four finalizer
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* hash functions to apply to the data (Blake, Groestl, JH, or Skein).
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* Use this hash to squeeze the state array down
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* to the final 256 bit hash output.
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*/
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memcpy(state.init, text, INIT_SIZE_BYTE);
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hash_permutation(&state.hs);
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extra_hashes[state.hs.b[0] & 3](&state, 200, hash);
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}
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#else /* aarch64 && crypto */
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// ND: Some minor optimizations for ARMv7 (raspberrry pi 2), effect seems to be ~40-50% faster.
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// Needs more work.
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#include "aesb.c"
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#ifdef NO_OPTIMIZED_MULTIPLY_ON_ARM
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@ -714,13 +976,21 @@ void mul(const uint8_t *ca, const uint8_t *cb, uint8_t *cres) {
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}
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#else // !NO_OPTIMIZED_MULTIPLY_ON_ARM
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/* Can work as inline, but actually runs slower. Keep it separate */
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#define mul(a, b, c) cn_mul128(a, b, c)
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void mul(const uint8_t *ca, const uint8_t *cb, uint8_t *cr)
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#ifdef __aarch64__ /* ARM64, no crypto */
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#define mul(a, b, c) cn_mul128((const uint64_t *)a, (const uint64_t *)b, (uint64_t *)c)
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STATIC void cn_mul128(const uint64_t *a, const uint64_t *b, uint64_t *r)
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{
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uint64_t lo, hi;
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__asm__("mul %0, %1, %2\n\t" : "=r"(lo) : "r"(a[0]), "r"(b[0]) );
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__asm__("umulh %0, %1, %2\n\t" : "=r"(hi) : "r"(a[0]), "r"(b[0]) );
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r[0] = hi;
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r[1] = lo;
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}
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#else /* ARM32 */
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/* Can work as inline, but actually runs slower. Keep it separate */
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#define mul(a, b, c) cn_mul128((const uint32_t *)a, (const uint32_t *)b, (uint32_t *)c)
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void cn_mul128(const uint32_t *aa, const uint32_t *bb, uint32_t *r)
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{
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const uint32_t *aa = (uint32_t *)ca;
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const uint32_t *bb = (uint32_t *)cb;
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uint32_t *r = (uint32_t *)cr;
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uint32_t t0, t1;
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__asm__ __volatile__(
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"umull %[t0], %[t1], %[a], %[b]\n\t"
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@ -743,10 +1013,11 @@ __asm__ __volatile__(
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"str %[t0], [%[r]]\n\t"
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"str %[t1], [%[r], #4]\n\t"
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: [t0]"=&r"(t0), [t1]"=&r"(t1)
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: [t0]"=&r"(t0), [t1]"=&r"(t1), "=m"(r[0]), "=m"(r[1]), "=m"(r[2]), "=m"(r[3])
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: [A]"r"(aa[1]), [a]"r"(aa[0]), [B]"r"(bb[1]), [b]"r"(bb[0]), [r]"r"(r)
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: "cc", "memory");
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: "cc");
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}
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#endif /* !aarch64 */
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#endif // NO_OPTIMIZED_MULTIPLY_ON_ARM
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STATIC INLINE void sum_half_blocks(uint8_t* a, const uint8_t* b)
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@ -779,18 +1050,6 @@ STATIC INLINE void xor_blocks(uint8_t* a, const uint8_t* b)
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U64(a)[1] ^= U64(b)[1];
|
||||
}
|
||||
|
||||
#pragma pack(push, 1)
|
||||
union cn_slow_hash_state
|
||||
{
|
||||
union hash_state hs;
|
||||
struct
|
||||
{
|
||||
uint8_t k[64];
|
||||
uint8_t init[INIT_SIZE_BYTE];
|
||||
};
|
||||
};
|
||||
#pragma pack(pop)
|
||||
|
||||
void cn_slow_hash(const void *data, size_t length, char *hash)
|
||||
{
|
||||
uint8_t long_state[MEMORY];
|
||||
|
|
@ -871,6 +1130,7 @@ void cn_slow_hash(const void *data, size_t length, char *hash)
|
|||
hash_permutation(&state.hs);
|
||||
extra_hashes[state.hs.b[0] & 3](&state, 200, hash);
|
||||
}
|
||||
#endif /* !aarch64 || !crypto */
|
||||
|
||||
#else
|
||||
// Portable implementation as a fallback
|
||||
|
|
@ -891,13 +1151,6 @@ static void (*const extra_hashes[4])(const void *, size_t, char *) = {
|
|||
hash_extra_blake, hash_extra_groestl, hash_extra_jh, hash_extra_skein
|
||||
};
|
||||
|
||||
#define MEMORY (1 << 21) /* 2 MiB */
|
||||
#define ITER (1 << 20)
|
||||
#define AES_BLOCK_SIZE 16
|
||||
#define AES_KEY_SIZE 32 /*16*/
|
||||
#define INIT_SIZE_BLK 8
|
||||
#define INIT_SIZE_BYTE (INIT_SIZE_BLK * AES_BLOCK_SIZE)
|
||||
|
||||
extern int aesb_single_round(const uint8_t *in, uint8_t*out, const uint8_t *expandedKey);
|
||||
extern int aesb_pseudo_round(const uint8_t *in, uint8_t *out, const uint8_t *expandedKey);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue